[llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)

[Jay Foad via llvm-commits]

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@@ -132,7 +132,7 @@ def V_MOV_B64_PSEUDO : VPseudoInstSI <(outs VReg_64:$vdst),
   let isAsCheapAsAMove = 1;
   let isMoveImm = 1;
   let SchedRW = [Write64Bit];
-  let Size = 16; // Needs maximum 2 v_mov_b32 instructions 8 byte long each.
+  let Size = 4;
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jayfoad wrote:

> What is the exact meaning of Size?

Good question. I think TargetInstrInfo::getInstSizeInBytes probably has to return a maximum size, since it is used by (for example) the BranchRelaxation pass. The exact meaning of the TableGen Size field is probably target-dependent.

https://github.com/llvm/llvm-project/pull/70376