[llvm] 945e943 - [AMDGPU] Fix subreg check in the SIFixSGPRCopies (#70007)

[via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2023-10-24T01:44:58-07:00
New Revision: 945e943db773e9f42da9cf9811d32f86a60158a1

URL: https://github.com/llvm/llvm-project/commit/945e943db773e9f42da9cf9811d32f86a60158a1
DIFF: https://github.com/llvm/llvm-project/commit/945e943db773e9f42da9cf9811d32f86a60158a1.diff

LOG: [AMDGPU] Fix subreg check in the SIFixSGPRCopies (#70007)

It checks for the copy of subregs, but it checks destination which may
never happen in SSA. It misses the subreg check and happily produces
S_MOV_B64 out of a subreg COPY.

The affected test should have never been formed in the first place
because the pass is running in SSA and copies into a subreg shall never
happen.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
    llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
index 60cd9d4c3c35a27..b32ed9fef5dd34e 100644
--- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
@@ -357,7 +357,7 @@ static bool isSafeToFoldImmIntoCopy(const MachineInstr *Copy,
     return false;
 
   // FIXME: Handle copies with sub-regs.
-  if (Copy->getOperand(0).getSubReg())
+  if (Copy->getOperand(1).getSubReg())
     return false;
 
   switch (MoveImm->getOpcode()) {

diff  --git a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
index 11cabedd27b7bd4..8d0a9899b5dbcc7 100644
--- a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
+++ b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
@@ -222,3 +222,14 @@ body:             |
     %4:sreg_32 = COPY %3:vgpr_32
     %5:sreg_32 = nofpexcept S_FMAC_F32 killed %4:sreg_32, %1:sreg_32, %2:sreg_32, implicit $mode
 ...
+
+---
+# GCN-LABEL: name: moveimm_subreg_input
+# GCN: %0:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
+# GCN: :vgpr_32 = COPY %0.sub0
+name:            moveimm_subreg_input
+body:             |
+  bb.0:
+    %0:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
+    %1:sreg_32 = COPY %0.sub0
+...

diff  --git a/llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir b/llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
index 59d5d7883a03268..6f42f4c53a03cf2 100644
--- a/llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
+++ b/llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
@@ -34,8 +34,7 @@ body:             |
 
 ---
 # GCN-LABEL: name: phi_moveimm_subreg_input
-# GCN-NOT: %{{[0-9]+}}:sreg_64 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
-# GCN: %{{[0-9]+}}:vreg_64 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
+# GCN: %{{[0-9]+}}:sreg_64 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
 name:            phi_moveimm_subreg_input
 tracksRegLiveness: true
 body:             |