[llvm] 9d35387 - [AArch64] Disable by default MachineSink sink-and-fold (#70101)

[via llvm-commits]

Author: Momchil Velikov
Date: 2023-10-25T10:58:31+01:00
New Revision: 9d35387811aaf150cabcae36146984732baa14c7

URL: https://github.com/llvm/llvm-project/commit/9d35387811aaf150cabcae36146984732baa14c7
DIFF: https://github.com/llvm/llvm-project/commit/9d35387811aaf150cabcae36146984732baa14c7.diff

LOG: [AArch64] Disable by default MachineSink sink-and-fold (#70101)

There is a report about a large compile time regression in V8 when
generating debug info.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    llvm/test/CodeGen/AArch64/aarch64-mulv.ll
    llvm/test/CodeGen/AArch64/arm64-indexed-memory.ll
    llvm/test/CodeGen/AArch64/machine-sink-cache-invalidation.ll
    llvm/test/CodeGen/AArch64/sink-and-fold.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 315af1a9a833307..02670fff35ccec1 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -200,7 +200,7 @@ static cl::opt<bool> EnableGISelLoadStoreOptPostLegal(
 static cl::opt<bool>
     EnableSinkFold("aarch64-enable-sink-fold",
                    cl::desc("Enable sinking and folding of instruction copies"),
-                   cl::init(true), cl::Hidden);
+                   cl::init(false), cl::Hidden);
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() {
   // Register the target.

diff  --git a/llvm/test/CodeGen/AArch64/aarch64-mulv.ll b/llvm/test/CodeGen/AArch64/aarch64-mulv.ll
index 819bd4f4c42a831..90f09379e68fd25 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-mulv.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-mulv.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
-; RUN: llc -mtriple=aarch64 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
+; RUN: llc -mtriple=aarch64 -aarch64-enable-sink-fold=true -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc -mtriple=aarch64 -aarch64-enable-sink-fold=true -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
 
 ; CHECK_GI:        warning: Instruction selection used fallback path for mulv_v3i64
 

diff  --git a/llvm/test/CodeGen/AArch64/arm64-indexed-memory.ll b/llvm/test/CodeGen/AArch64/arm64-indexed-memory.ll
index 050c7e30ad2f934..a4da48917140308 100644
--- a/llvm/test/CodeGen/AArch64/arm64-indexed-memory.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-indexed-memory.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=arm64-apple-ios -aarch64-redzone | FileCheck %s --check-prefixes=CHECK,CHECK64
-; RUN: llc < %s -mtriple=arm64-apple-ios -aarch64-redzone -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=CHECK,GISEL
-; RUN: llc < %s -mtriple=arm64_32-apple-ios -aarch64-redzone | FileCheck %s --check-prefixes=CHECK,CHECK32
+; RUN: llc < %s -mtriple=arm64-apple-ios -aarch64-enable-sink-fold=true -aarch64-redzone | FileCheck %s --check-prefixes=CHECK,CHECK64
+; RUN: llc < %s -mtriple=arm64-apple-ios -aarch64-enable-sink-fold=true -aarch64-redzone -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=CHECK,GISEL
+; RUN: llc < %s -mtriple=arm64_32-apple-ios -aarch64-enable-sink-fold=true -aarch64-redzone | FileCheck %s --check-prefixes=CHECK,CHECK32
 
 define ptr @store64(ptr %ptr, i64 %index, i64 %spacing) {
 ; CHECK-LABEL: store64:

diff  --git a/llvm/test/CodeGen/AArch64/machine-sink-cache-invalidation.ll b/llvm/test/CodeGen/AArch64/machine-sink-cache-invalidation.ll
index ce000021fb29bff..6effc63ecc13ceb 100644
--- a/llvm/test/CodeGen/AArch64/machine-sink-cache-invalidation.ll
+++ b/llvm/test/CodeGen/AArch64/machine-sink-cache-invalidation.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=aarch64 -global-isel | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64 -aarch64-enable-sink-fold=true -global-isel | FileCheck %s
 
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 target triple = "arm64-apple-macosx13.5.0"

diff  --git a/llvm/test/CodeGen/AArch64/sink-and-fold.ll b/llvm/test/CodeGen/AArch64/sink-and-fold.ll
index 52007221e12a7b5..632fdb391053121 100644
--- a/llvm/test/CodeGen/AArch64/sink-and-fold.ll
+++ b/llvm/test/CodeGen/AArch64/sink-and-fold.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -aarch64-enable-sink-fold=true < %s | FileCheck %s
 target triple = "aarch64-linux"
 
 declare i32 @use(...)