[llvm] [RISCV][GISel] Add legalizer support for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69804)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 25 12:40:08 PDT 2023
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/69804
>From 83cc4610223971823b276c06885419bf20223e18 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 20 Oct 2023 19:11:43 -0700
Subject: [PATCH] [RISCV][GISel] Add legalizer support for
G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions.
This a simple patch to get initial FP support started.
---
.../Target/RISCV/GISel/RISCVLegalizerInfo.cpp | 9 +
.../legalizer/legalize-fp-arith.mir | 174 ++++++++++++++++++
2 files changed, 183 insertions(+)
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith.mir
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index bc1150457d71118..39c693ed32b3864 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -28,6 +28,7 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
const LLT s8 = LLT::scalar(8);
const LLT s16 = LLT::scalar(16);
const LLT s32 = LLT::scalar(32);
+ const LLT s64 = LLT::scalar(64);
using namespace TargetOpcode;
@@ -203,6 +204,14 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
getActionDefinitionsBuilder(G_FRAME_INDEX).legalFor({p0});
+ // FP Operations
+
+ getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})
+ .legalIf([=, &ST](const LegalityQuery &Query) -> bool {
+ return (ST.hasStdExtF() && typeIs(0, s32)(Query)) ||
+ (ST.hasStdExtD() && typeIs(0, s64)(Query));
+ });
+
getLegacyLegalizerInfo().computeTables();
}
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith.mir
new file mode 100644
index 000000000000000..e6a6c695e145b5f
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith.mir
@@ -0,0 +1,174 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+
+---
+name: fadd_f32
+body: |
+ bb.0:
+ liveins: $f10_f, $f11_f
+
+ ; CHECK-LABEL: name: fadd_f32
+ ; CHECK: liveins: $f10_f, $f11_f
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f11_f
+ ; CHECK-NEXT: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $f10_f = COPY [[FADD]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s32) = COPY $f10_f
+ %1:_(s32) = COPY $f11_f
+ %2:_(s32) = G_FADD %0, %1
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: fsub_f32
+body: |
+ bb.0:
+ liveins: $f10_f, $f11_f
+
+ ; CHECK-LABEL: name: fsub_f32
+ ; CHECK: liveins: $f10_f, $f11_f
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f11_f
+ ; CHECK-NEXT: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $f10_f = COPY [[FSUB]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s32) = COPY $f10_f
+ %1:_(s32) = COPY $f11_f
+ %2:_(s32) = G_FSUB %0, %1
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: fmul_f32
+body: |
+ bb.0:
+ liveins: $f10_f, $f11_f
+
+ ; CHECK-LABEL: name: fmul_f32
+ ; CHECK: liveins: $f10_f, $f11_f
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f11_f
+ ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $f10_f = COPY [[FMUL]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s32) = COPY $f10_f
+ %1:_(s32) = COPY $f11_f
+ %2:_(s32) = G_FMUL %0, %1
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: fdiv_f32
+body: |
+ bb.0:
+ liveins: $f10_f, $f11_f
+
+ ; CHECK-LABEL: name: fdiv_f32
+ ; CHECK: liveins: $f10_f, $f11_f
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f11_f
+ ; CHECK-NEXT: [[FDIV:%[0-9]+]]:_(s32) = G_FDIV [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $f10_f = COPY [[FDIV]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s32) = COPY $f10_f
+ %1:_(s32) = COPY $f11_f
+ %2:_(s32) = G_FDIV %0, %1
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: fadd_f64
+body: |
+ bb.0:
+ liveins: $f10_d, $f11_d
+
+ ; CHECK-LABEL: name: fadd_f64
+ ; CHECK: liveins: $f10_d, $f11_d
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $f11_d
+ ; CHECK-NEXT: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $f10_d = COPY [[FADD]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $f10_d
+ %1:_(s64) = COPY $f11_d
+ %2:_(s64) = G_FADD %0, %1
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: fsub_f64
+body: |
+ bb.0:
+ liveins: $f10_d, $f11_d
+
+ ; CHECK-LABEL: name: fsub_f64
+ ; CHECK: liveins: $f10_d, $f11_d
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $f11_d
+ ; CHECK-NEXT: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $f10_d = COPY [[FSUB]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $f10_d
+ %1:_(s64) = COPY $f11_d
+ %2:_(s64) = G_FSUB %0, %1
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: fmul_f64
+body: |
+ bb.0:
+ liveins: $f10_d, $f11_d
+
+ ; CHECK-LABEL: name: fmul_f64
+ ; CHECK: liveins: $f10_d, $f11_d
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $f11_d
+ ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $f10_d = COPY [[FMUL]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $f10_d
+ %1:_(s64) = COPY $f11_d
+ %2:_(s64) = G_FMUL %0, %1
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: fdiv_f64
+body: |
+ bb.0:
+ liveins: $f10_d, $f11_d
+
+ ; CHECK-LABEL: name: fdiv_f64
+ ; CHECK: liveins: $f10_d, $f11_d
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $f11_d
+ ; CHECK-NEXT: [[FDIV:%[0-9]+]]:_(s64) = G_FDIV [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $f10_d = COPY [[FDIV]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $f10_d
+ %1:_(s64) = COPY $f11_d
+ %2:_(s64) = G_FDIV %0, %1
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
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