[llvm] [AMDGPU] Use alloca address space in rewrite-out-arguments.ll (PR #70269)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 25 15:48:46 PDT 2023
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Alexander Richardson (arichardson)
<details>
<summary>Changes</summary>
This is needed for the transform to fire with a correct data layout. Pre-commiting this change to keep the diff of D141060 smaller.
---
Patch is 70.54 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/70269.diff
1 Files Affected:
- (modified) llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll (+327-325)
``````````diff
diff --git a/llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll b/llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
index 72d0053693b789d..0d35ba8e1161e9a 100644
--- a/llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
+++ b/llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
@@ -1,119 +1,121 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-rewrite-out-arguments < %s | FileCheck %s
-
+; Temporarily add an explicit datalayout until https://reviews.llvm.org/D141060 lands
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8"
+target triple = "amdgcn-amd-amdhsa"
define void @no_ret_blocks() #0 {
unreachable
}
-define void @void_one_out_arg_i32_no_use(ptr %val) #0 {
+define void @void_one_out_arg_i32_no_use(ptr addrspace(5) %val) #0 {
ret void
}
-define void @skip_byval_arg(ptr byval(i32) %val) #0 {
- store i32 0, ptr %val
+define void @skip_byval_arg(ptr addrspace(5) byval(i32) %val) #0 {
+ store i32 0, ptr addrspace(5) %val
ret void
}
-define void @skip_optnone(ptr byval(i32) %val) #1 {
- store i32 0, ptr %val
+define void @skip_optnone(ptr addrspace(5) byval(i32) %val) #1 {
+ store i32 0, ptr addrspace(5) %val
ret void
}
-define void @skip_volatile(ptr byval(i32) %val) #0 {
- store volatile i32 0, ptr %val
+define void @skip_volatile(ptr addrspace(5) byval(i32) %val) #0 {
+ store volatile i32 0, ptr addrspace(5) %val
ret void
}
-define void @skip_atomic(ptr byval(i32) %val) #0 {
- store atomic i32 0, ptr %val seq_cst, align 4
+define void @skip_atomic(ptr addrspace(5) byval(i32) %val) #0 {
+ store atomic i32 0, ptr addrspace(5) %val seq_cst, align 4
ret void
}
-define void @skip_store_pointer_val(ptr %val) #0 {
- store ptr %val, ptr poison
+define void @skip_store_pointer_val(ptr addrspace(5) %val) #0 {
+ store ptr addrspace(5) %val, ptr poison
ret void
}
-define void @skip_store_gep(ptr %val) #0 {
- %gep = getelementptr inbounds i32, ptr %val, i32 1
- store i32 0, ptr %gep
+define void @skip_store_gep(ptr addrspace(5) %val) #0 {
+ %gep = getelementptr inbounds i32, ptr addrspace(5) %val, i32 1
+ store i32 0, ptr addrspace(5) %gep
ret void
}
-define void @skip_sret(ptr sret(i32) %sret, ptr %out) #0 {
- store i32 1, ptr %sret
- store i32 0, ptr %out
+define void @skip_sret(ptr addrspace(5) sret(i32) %sret, ptr addrspace(5) %out) #0 {
+ store i32 1, ptr addrspace(5) %sret
+ store i32 0, ptr addrspace(5) %out
ret void
}
-define void @void_one_out_arg_i32_1_use(ptr %val) #0 {
- store i32 0, ptr %val
+define void @void_one_out_arg_i32_1_use(ptr addrspace(5) %val) #0 {
+ store i32 0, ptr addrspace(5) %val
ret void
}
-define void @void_one_out_arg_i32_1_use_align(ptr align 8 %val) #0 {
- store i32 0, ptr %val, align 8
+define void @void_one_out_arg_i32_1_use_align(ptr addrspace(5) align 8 %val) #0 {
+ store i32 0, ptr addrspace(5) %val, align 8
ret void
}
-define void @void_one_out_arg_i32_2_use(i1 %arg0, ptr %val) #0 {
+define void @void_one_out_arg_i32_2_use(i1 %arg0, ptr addrspace(5) %val) #0 {
br i1 %arg0, label %ret0, label %ret1
ret0:
- store i32 0, ptr %val
+ store i32 0, ptr addrspace(5) %val
ret void
ret1:
- store i32 9, ptr %val
+ store i32 9, ptr addrspace(5) %val
ret void
}
declare void @may.clobber()
-define void @void_one_out_arg_i32_2_stores(ptr %val) #0 {
- store i32 0, ptr %val
- store i32 1, ptr %val
+define void @void_one_out_arg_i32_2_stores(ptr addrspace(5) %val) #0 {
+ store i32 0, ptr addrspace(5) %val
+ store i32 1, ptr addrspace(5) %val
ret void
}
-define void @void_one_out_arg_i32_2_stores_clobber(ptr %val) #0 {
- store i32 0, ptr %val
+define void @void_one_out_arg_i32_2_stores_clobber(ptr addrspace(5) %val) #0 {
+ store i32 0, ptr addrspace(5) %val
call void @may.clobber()
- store i32 1, ptr %val
+ store i32 1, ptr addrspace(5) %val
ret void
}
-define void @void_one_out_arg_i32_call_may_clobber(ptr %val) #0 {
- store i32 0, ptr %val
+define void @void_one_out_arg_i32_call_may_clobber(ptr addrspace(5) %val) #0 {
+ store i32 0, ptr addrspace(5) %val
call void @may.clobber()
ret void
}
-define void @void_one_out_arg_i32_pre_call_may_clobber(ptr %val) #0 {
+define void @void_one_out_arg_i32_pre_call_may_clobber(ptr addrspace(5) %val) #0 {
call void @may.clobber()
- store i32 0, ptr %val
+ store i32 0, ptr addrspace(5) %val
ret void
}
-define void @void_one_out_arg_i32_reload(ptr %val) #0 {
- store i32 0, ptr %val
- %load = load i32, ptr %val, align 4
+define void @void_one_out_arg_i32_reload(ptr addrspace(5) %val) #0 {
+ store i32 0, ptr addrspace(5) %val
+ %load = load i32, ptr addrspace(5) %val, align 4
ret void
}
-define void @void_one_out_arg_i32_store_in_different_block(ptr %out) #0 {
+define void @void_one_out_arg_i32_store_in_different_block(ptr addrspace(5) %out) #0 {
%load = load i32, ptr addrspace(1) poison
- store i32 0, ptr %out
+ store i32 0, ptr addrspace(5) %out
br label %ret
ret:
@@ -121,20 +123,20 @@ ret:
}
-define void @unused_out_arg_one_branch(i1 %arg0, ptr %val) #0 {
+define void @unused_out_arg_one_branch(i1 %arg0, ptr addrspace(5) %val) #0 {
br i1 %arg0, label %ret0, label %ret1
ret0:
ret void
ret1:
- store i32 9, ptr %val
+ store i32 9, ptr addrspace(5) %val
ret void
}
-define void @void_one_out_arg_v2i32_1_use(ptr %val) #0 {
- store <2 x i32> <i32 17, i32 9>, ptr %val
+define void @void_one_out_arg_v2i32_1_use(ptr addrspace(5) %val) #0 {
+ store <2 x i32> <i32 17, i32 9>, ptr addrspace(5) %val
ret void
}
@@ -142,50 +144,50 @@ define void @void_one_out_arg_v2i32_1_use(ptr %val) #0 {
; Normally this is split into element accesses which we don't handle.
-define void @void_one_out_arg_struct_1_use(ptr %out) #0 {
- store %struct { i32 9, i8 99, float 4.0 }, ptr %out
+define void @void_one_out_arg_struct_1_use(ptr addrspace(5) %out) #0 {
+ store %struct { i32 9, i8 99, float 4.0 }, ptr addrspace(5) %out
ret void
}
-define i32 @i32_one_out_arg_i32_1_use(ptr %val) #0 {
- store i32 24, ptr %val
+define i32 @i32_one_out_arg_i32_1_use(ptr addrspace(5) %val) #0 {
+ store i32 24, ptr addrspace(5) %val
ret i32 9
}
-define void @unused_different_type(ptr %arg0, ptr nocapture %arg1) #0 {
- store float 4.0, ptr %arg1, align 4
+define void @unused_different_type(ptr addrspace(5) %arg0, ptr addrspace(5) nocapture %arg1) #0 {
+ store float 4.0, ptr addrspace(5) %arg1, align 4
ret void
}
-define void @multiple_same_return_noalias(ptr noalias %out0, ptr noalias %out1) #0 {
- store i32 1, ptr %out0, align 4
- store i32 2, ptr %out1, align 4
+define void @multiple_same_return_noalias(ptr addrspace(5) noalias %out0, ptr addrspace(5) noalias %out1) #0 {
+ store i32 1, ptr addrspace(5) %out0, align 4
+ store i32 2, ptr addrspace(5) %out1, align 4
ret void
}
-define void @multiple_same_return_mayalias(ptr %out0, ptr %out1) #0 {
- store i32 1, ptr %out0, align 4
- store i32 2, ptr %out1, align 4
+define void @multiple_same_return_mayalias(ptr addrspace(5) %out0, ptr addrspace(5) %out1) #0 {
+ store i32 1, ptr addrspace(5) %out0, align 4
+ store i32 2, ptr addrspace(5) %out1, align 4
ret void
}
-define void @multiple_same_return_mayalias_order(ptr %out0, ptr %out1) #0 {
- store i32 2, ptr %out1, align 4
- store i32 1, ptr %out0, align 4
+define void @multiple_same_return_mayalias_order(ptr addrspace(5) %out0, ptr addrspace(5) %out1) #0 {
+ store i32 2, ptr addrspace(5) %out1, align 4
+ store i32 1, ptr addrspace(5) %out0, align 4
ret void
}
; Currently this fails to convert because the store won't be found if
; it isn't in the same block as the return.
-define i32 @store_in_entry_block(i1 %arg0, ptr %out) #0 {
+define i32 @store_in_entry_block(i1 %arg0, ptr addrspace(5) %out) #0 {
entry:
%val0 = load i32, ptr addrspace(1) poison
- store i32 %val0, ptr %out
+ store i32 %val0, ptr addrspace(5) %out
br i1 %arg0, label %if, label %endif
if:
@@ -198,8 +200,8 @@ endif:
}
-define i1 @i1_one_out_arg_i32_1_use(ptr %val) #0 {
- store i32 24, ptr %val
+define i1 @i1_one_out_arg_i32_1_use(ptr addrspace(5) %val) #0 {
+ store i32 24, ptr addrspace(5) %val
ret i1 true
}
@@ -207,20 +209,20 @@ define i1 @i1_one_out_arg_i32_1_use(ptr %val) #0 {
; incompatible with struct return types.
-define zeroext i1 @i1_zeroext_one_out_arg_i32_1_use(ptr %val) #0 {
- store i32 24, ptr %val
+define zeroext i1 @i1_zeroext_one_out_arg_i32_1_use(ptr addrspace(5) %val) #0 {
+ store i32 24, ptr addrspace(5) %val
ret i1 true
}
-define signext i1 @i1_signext_one_out_arg_i32_1_use(ptr %val) #0 {
- store i32 24, ptr %val
+define signext i1 @i1_signext_one_out_arg_i32_1_use(ptr addrspace(5) %val) #0 {
+ store i32 24, ptr addrspace(5) %val
ret i1 true
}
-define noalias ptr addrspace(1) @p1i32_noalias_one_out_arg_i32_1_use(ptr %val) #0 {
- store i32 24, ptr %val
+define noalias ptr addrspace(1) @p1i32_noalias_one_out_arg_i32_1_use(ptr addrspace(5) %val) #0 {
+ store i32 24, ptr addrspace(5) %val
ret ptr addrspace(1) null
}
@@ -229,74 +231,74 @@ define void @void_one_out_non_private_arg_i32_1_use(ptr addrspace(1) %val) #0 {
ret void
}
-define void @func_ptr_type(ptr %out) #0 {
+define void @func_ptr_type(ptr addrspace(5) %out) #0 {
%func = load ptr, ptr poison
- store ptr %func, ptr %out
+ store ptr %func, ptr addrspace(5) %out
ret void
}
-define void @bitcast_func_ptr_type(ptr %out) #0 {
+define void @bitcast_func_ptr_type(ptr addrspace(5) %out) #0 {
%func = load ptr, ptr poison
- store ptr %func, ptr %out
+ store ptr %func, ptr addrspace(5) %out
ret void
}
-define void @out_arg_small_array(ptr %val) #0 {
- store [4 x i32] [i32 0, i32 1, i32 2, i32 3], ptr %val
+define void @out_arg_small_array(ptr addrspace(5) %val) #0 {
+ store [4 x i32] [i32 0, i32 1, i32 2, i32 3], ptr addrspace(5) %val
ret void
}
-define void @out_arg_large_array(ptr %val) #0 {
- store [17 x i32] zeroinitializer, ptr %val
+define void @out_arg_large_array(ptr addrspace(5) %val) #0 {
+ store [17 x i32] zeroinitializer, ptr addrspace(5) %val
ret void
}
-define <16 x i32> @num_regs_return_limit(ptr %out, i32 %val) #0 {
+define <16 x i32> @num_regs_return_limit(ptr addrspace(5) %out, i32 %val) #0 {
%load = load volatile <16 x i32>, ptr addrspace(1) poison
- store i32 %val, ptr %out
+ store i32 %val, ptr addrspace(5) %out
ret <16 x i32> %load
}
-define [15 x i32] @num_regs_reach_limit(ptr %out, i32 %val) #0 {
+define [15 x i32] @num_regs_reach_limit(ptr addrspace(5) %out, i32 %val) #0 {
%load = load volatile [15 x i32], ptr addrspace(1) poison
- store i32 %val, ptr %out
+ store i32 %val, ptr addrspace(5) %out
ret [15 x i32] %load
}
-define [15 x i32] @num_regs_reach_limit_leftover(ptr %out0, ptr %out1, i32 %val0) #0 {
+define [15 x i32] @num_regs_reach_limit_leftover(ptr addrspace(5) %out0, ptr addrspace(5) %out1, i32 %val0) #0 {
%load0 = load volatile [15 x i32], ptr addrspace(1) poison
%load1 = load volatile i32, ptr addrspace(1) poison
- store i32 %val0, ptr %out0
- store i32 %load1, ptr %out1
+ store i32 %val0, ptr addrspace(5) %out0
+ store i32 %load1, ptr addrspace(5) %out1
ret [15 x i32] %load0
}
-define void @preserve_debug_info(i32 %arg0, ptr %val) #0 !dbg !5 {
+define void @preserve_debug_info(i32 %arg0, ptr addrspace(5) %val) #0 !dbg !5 {
call void @may.clobber(), !dbg !10
- store i32 %arg0, ptr %val, !dbg !11
+ store i32 %arg0, ptr addrspace(5) %val, !dbg !11
ret void, !dbg !12
}
-define void @preserve_metadata(i32 %arg0, ptr %val) #0 !kernel_arg_access_qual !13 {
+define void @preserve_metadata(i32 %arg0, ptr addrspace(5) %val) #0 !kernel_arg_access_qual !13 {
call void @may.clobber()
- store i32 %arg0, ptr %val
+ store i32 %arg0, ptr addrspace(5) %val
ret void
}
; Clang emits this pattern for 3-vectors for some reason.
-define void @bitcast_pointer_v4i32_v3i32(ptr %out) #0 {
+define void @bitcast_pointer_v4i32_v3i32(ptr addrspace(5) %out) #0 {
%load = load volatile <4 x i32>, ptr addrspace(1) poison
- store <4 x i32> %load, ptr %out
+ store <4 x i32> %load, ptr addrspace(5) %out
ret void
}
-define void @bitcast_pointer_v4i32_v3f32(ptr %out) #0 {
+define void @bitcast_pointer_v4i32_v3f32(ptr addrspace(5) %out) #0 {
%load = load volatile <4 x i32>, ptr addrspace(1) poison
- store <4 x i32> %load, ptr %out
+ store <4 x i32> %load, ptr addrspace(5) %out
ret void
}
@@ -305,21 +307,21 @@ define void @bitcast_pointer_v4i32_v3f32(ptr %out) #0 {
; casts.
-define void @bitcast_pointer_i32_f32(ptr %out) #0 {
+define void @bitcast_pointer_i32_f32(ptr addrspace(5) %out) #0 {
%load = load volatile i32, ptr addrspace(1) poison
- store i32 %load, ptr %out
+ store i32 %load, ptr addrspace(5) %out
ret void
}
-define void @bitcast_pointer_i32_f16(ptr %out) #0 {
+define void @bitcast_pointer_i32_f16(ptr addrspace(5) %out) #0 {
%load = load volatile i32, ptr addrspace(1) poison
- store i32 %load, ptr %out
+ store i32 %load, ptr addrspace(5) %out
ret void
}
-define void @bitcast_pointer_f16_i32(ptr %out) #0 {
+define void @bitcast_pointer_f16_i32(ptr addrspace(5) %out) #0 {
%load = load volatile half, ptr addrspace(1) poison
- store half %load, ptr %out
+ store half %load, ptr addrspace(5) %out
ret void
}
@@ -330,80 +332,80 @@ define void @bitcast_pointer_f16_i32(ptr %out) #0 {
%struct.v4f32 = type { <4 x float> }
-define void @bitcast_struct_v3f32_v3f32(ptr %out, <3 x float> %value) #0 {
+define void @bitcast_struct_v3f32_v3f32(ptr addrspace(5) %out, <3 x float> %value) #0 {
%extractVec = shufflevector <3 x float> %value, <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
- store <4 x float> %extractVec, ptr %out, align 16
+ store <4 x float> %extractVec, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_struct_v3f32_v3i32(ptr %out, <3 x i32> %value) #0 {
+define void @bitcast_struct_v3f32_v3i32(ptr addrspace(5) %out, <3 x i32> %value) #0 {
%extractVec = shufflevector <3 x i32> %value, <3 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
- store <4 x i32> %extractVec, ptr %out, align 16
+ store <4 x i32> %extractVec, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_struct_v4f32_v4f32(ptr %out, <4 x float> %value) #0 {
- store <4 x float> %value, ptr %out, align 16
+define void @bitcast_struct_v4f32_v4f32(ptr addrspace(5) %out, <4 x float> %value) #0 {
+ store <4 x float> %value, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_struct_v3f32_v4i32(ptr %out, <4 x i32> %value) #0 {
- store <4 x i32> %value, ptr %out, align 16
+define void @bitcast_struct_v3f32_v4i32(ptr addrspace(5) %out, <4 x i32> %value) #0 {
+ store <4 x i32> %value, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_struct_v4f32_v3f32(ptr %out, <3 x float> %value) #0 {
+define void @bitcast_struct_v4f32_v3f32(ptr addrspace(5) %out, <3 x float> %value) #0 {
%extractVec = shufflevector <3 x float> %value, <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
- store <4 x float> %extractVec, ptr %out, align 16
+ store <4 x float> %extractVec, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_struct_v3f32_v2f32(ptr %out, <2 x float> %value) #0 {
- store <2 x float> %value, ptr %out, align 8
+define void @bitcast_struct_v3f32_v2f32(ptr addrspace(5) %out, <2 x float> %value) #0 {
+ store <2 x float> %value, ptr addrspace(5) %out, align 8
ret void
}
-define void @bitcast_struct_v3f32_f32_v3f32(ptr %out, <3 x float> %value) #0 {
+define void @bitcast_struct_v3f32_f32_v3f32(ptr addrspace(5) %out, <3 x float> %value) #0 {
%extractVec = shufflevector <3 x float> %value, <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
- store <4 x float> %extractVec, ptr %out, align 16
+ store <4 x float> %extractVec, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_struct_v3f32_f32_v4f32(ptr %out, <4 x float> %value) #0 {
- store <4 x float> %value, ptr %out, align 16
+define void @bitcast_struct_v3f32_f32_v4f32(ptr addrspace(5) %out, <4 x float> %value) #0 {
+ store <4 x float> %value, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_struct_i128_v4f32(ptr %out, <4 x float> %value) #0 {
- store <4 x float> %value, ptr %out, align 16
+define void @bitcast_struct_i128_v4f32(ptr addrspace(5) %out, <4 x float> %value) #0 {
+ store <4 x float> %value, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_array_v4i32_v4f32(ptr %out, [4 x float] %value) #0 {
- store [4 x float] %value, ptr %out, align 4
+define void @bitcast_array_v4i32_v4f32(ptr addrspace(5) %out, [4 x float] %value) #0 {
+ store [4 x float] %value, ptr addrspace(5) %out, align 4
ret void
}
-define void @multi_return_bitcast_struct_v3f32_v3f32(i1 %cond, ptr %out, <3 x float> %value) #0 {
+define void @multi_return_bitcast_struct_v3f32_v3f32(i1 %cond, ptr addrspace(5) %out, <3 x float> %value) #0 {
entry:
br i1 %cond, label %ret0, label %ret1
ret0:
%extractVec = shufflevector <3 x float> %value, <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
- store <4 x float> %extractVec, ptr %out, align 16
+ store <4 x float> %extractVec, ptr addrspace(5) %out, align 16
ret void
ret1:
%load = load <4 x float>, ptr addrspace(1) poison
- store <4 x float> %load, ptr %out, align 16
+ store <4 x float> %load, ptr addrspace(5) %out, align 16
ret void
}
-define void @bitcast_v3f32_struct_v3f32(ptr %out, %struct.v3f32 %value) #0 {
- store %struct.v3f32 %value, ptr %out, align 4
+define void @bitcast_v3f32_struct_v3f32(ptr addrspace(5) %out, %struct.v3f32 %value) #0 {
+ store %struct.v3f32 %value, ptr addrspace(5) %out, align 4
ret void
}
@@ -435,82 +437,82 @@ attributes #2 = { alwaysinline nounwind }
;
;
; CHECK-LABEL: define {{[^@]+}}@void_one_out_arg_i32_no_use
-; CHECK-SAME: (ptr [[VAL:%.*]]) #[[ATTR0]] {
+; CHECK-SAME: (ptr addrspace(5) [[VAL:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: ret void
;
;
; CHECK-LABEL: define {{[^@]+}}@skip_byval_arg
-; CHECK-SAME: (ptr byval(i32) [[VAL:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: store i32 0, ptr [[VAL]], align 4
+; CHECK-SAME: (ptr addrspace(5) byval(i32) [[VAL:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: store i32 0, ptr addrspace(5) [[VAL]], align 4
; CHECK-NEXT: ret void
;
;
; CHECK-LABEL: define {{[^@]+}}@skip_optnone
-; CHECK-SAME: (ptr byval(i32) [[VAL:%.*]]) #[[ATTR1:[0-9]+]] {
-; CHECK-NEXT: store i32 0, ptr [[VAL]], align 4
+; CHECK-SAME: (ptr addrspace(5) byval(i32) [[VAL:%.*]]) #[[ATTR1:[0-9]+]] {
+; CHECK-NEXT: store i32 0, ptr addrspace(5) [[VAL]], align 4
; CHECK-NEXT: ret void
;
;
; CHECK-LABEL: define {{[^@]+}}@skip_volatile
-; CHECK-SAME: (ptr byval(i32) [[VAL:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: store volatile i32 0, ptr [[VAL]], align 4
+; CHECK-SAME: (ptr addrspace(5) byval(i32) [[VAL:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: store volatile i32 0, ptr addrspace(5) [[VAL]], align 4
; CHECK-NEXT: ret void
;
;
; CHECK-LABEL: define {{[^@]+}}@skip_atomic
-; CHECK-SAME: (ptr byval(i32) [[VAL:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: store atomic i32 0, ptr [[VAL]] seq_cst, align 4
+; CHECK-SAME: (ptr addrspace(5) byval(i32) [[VAL:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: store atomic i32 0, ptr addrspace(5) [[VAL]] seq_cst, align 4
; CHECK-NEXT: ret void
;
;
; CHECK-LABEL: define {{[^@]+}}@skip_store_pointer_val
-; CHECK-SAME: (ptr [[VAL:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: store ptr [[VAL]], ptr poison, align 8
+; CHECK-SAME: (ptr addrspace(5) [[VAL:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: store ptr addrspace(5) [[VAL]], ptr poison, align 4
; CHECK-NEXT: ret void
;
;
; CHECK-LABEL: define {{[^@]+}}@skip_store_gep
-; CHECK-SAME: (ptr [[VAL:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[VAL]], i32 1
-; CHECK-NEXT: store i32 0, ptr [[GEP]], align 4
+; CHECK-SAME: (ptr addrspace(5) [[VAL:%.*]]) #[[ATTR0]] {
+; CHEC...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/70269
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