[llvm] f2eef3f - [DAG] Add test case for Issue #69965

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-10-24T13:58:18+01:00
New Revision: f2eef3fab64e6110c726548d42350e20734e6752

URL: https://github.com/llvm/llvm-project/commit/f2eef3fab64e6110c726548d42350e20734e6752
DIFF: https://github.com/llvm/llvm-project/commit/f2eef3fab64e6110c726548d42350e20734e6752.diff

LOG: [DAG] Add test case for Issue #69965

Added: 
    llvm/test/CodeGen/X86/pr69965.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/pr69965.ll b/llvm/test/CodeGen/X86/pr69965.ll
new file mode 100644
index 000000000000000..fc805e5097c0b85
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr69965.ll
@@ -0,0 +1,41 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
+
+define i16 @test(i8 %_in) {
+; X86-LABEL: test:
+; X86:       # %bb.0:
+; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    notb %al
+; X86-NEXT:    movl %eax, %ecx
+; X86-NEXT:    orb $-128, %cl
+; X86-NEXT:    movzbl %cl, %ecx
+; X86-NEXT:    shll $8, %ecx
+; X86-NEXT:    addb %al, %al
+; X86-NEXT:    movzbl %al, %eax
+; X86-NEXT:    orl %ecx, %eax
+; X86-NEXT:    # kill: def $ax killed $ax killed $eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: test:
+; X64:       # %bb.0:
+; X64-NEXT:    notb %dil
+; X64-NEXT:    movl %edi, %eax
+; X64-NEXT:    orb $-128, %al
+; X64-NEXT:    movzbl %al, %ecx
+; X64-NEXT:    shll $8, %ecx
+; X64-NEXT:    addb %dil, %dil
+; X64-NEXT:    movzbl %dil, %eax
+; X64-NEXT:    orl %ecx, %eax
+; X64-NEXT:    # kill: def $ax killed $ax killed $eax
+; X64-NEXT:    retq
+  %_1 = and i8 %_in, 127
+  %_2 = xor i8 %_1, 127
+  %_3 = or i8 %_2, -128
+  %_4 = zext i8 %_3 to i16
+  %_6 = shl nuw i16 %_4, 8
+  %_7 = shl nuw i8 %_2, 1
+  %_8 = zext i8 %_7 to i16
+  %_9 = or i16 %_6, %_8
+  ret i16 %_9
+}