[llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)

[Matt Arsenault via llvm-commits]

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@@ -8335,8 +8335,14 @@ unsigned SIInstrInfo::getLiveRangeSplitOpcode(Register SrcReg,
 }
 
 bool SIInstrInfo::isBasicBlockPrologue(const MachineInstr &MI) const {
-  return !MI.isTerminator() && MI.getOpcode() != AMDGPU::COPY &&
-         MI.modifiesRegister(AMDGPU::EXEC, &RI);
+  // It should cover all possible instructions inserted during regalloc in the
+  // block prolog.
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arsenm wrote:

This should elaborate on why. It's still a pretty dicey assumption

https://github.com/llvm/llvm-project/pull/69924