[llvm] 8715600 - [AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (#70135)

[via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2023-10-25T10:50:53-07:00
New Revision: 8715600435c7650addabcf2a8337bdfd3297c58d

URL: https://github.com/llvm/llvm-project/commit/8715600435c7650addabcf2a8337bdfd3297c58d
DIFF: https://github.com/llvm/llvm-project/commit/8715600435c7650addabcf2a8337bdfd3297c58d.diff

LOG: [AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (#70135)

This is mostly NFCI as V_MOV_B64_PSEUDO is selected instead and expanded
past RA.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/VOP1Instructions.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
index 734db326fb77ddd..9c19091e3d583f1 100644
--- a/llvm/lib/Target/AMDGPU/VOP1Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
@@ -221,7 +221,7 @@ def VOPProfile_MOV : VOPProfile <[i32, i32, untyped, untyped]> {
 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
 defm V_MOV_B32 : VOP1Inst <"v_mov_b32", VOPProfile_MOV, null_frag, 0x8>;
 
-let SubtargetPredicate = isGFX940Plus in
+let SubtargetPredicate = isGFX940Plus, SchedRW = [Write64Bit] in
 defm V_MOV_B64 : VOP1Inst <"v_mov_b64", VOP_I64_I64>;
 } // End isMoveImm = 1