[llvm] cf3ac96 - [InstCombine] Add additional demanded bits tests for shifts (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2023-10-26T11:03:58+02:00
New Revision: cf3ac964dc0e1b967594aee2bdbfb6a4518e4dfe

URL: https://github.com/llvm/llvm-project/commit/cf3ac964dc0e1b967594aee2bdbfb6a4518e4dfe
DIFF: https://github.com/llvm/llvm-project/commit/cf3ac964dc0e1b967594aee2bdbfb6a4518e4dfe.diff

LOG: [InstCombine] Add additional demanded bits tests for shifts (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/shift.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
index bfed2dfe55fd500..7b9626331ff2907 100644
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -2126,3 +2126,75 @@ define <2 x i8> @ashr_vec_or6_fail(<2 x i8> %x, <2 x i8> %c) {
   %y = ashr <2 x i8> %x, %amt
   ret <2 x i8> %y
 }
+
+define i16 @lshr_and_not_demanded(i8 %x) {
+; CHECK-LABEL: @lshr_and_not_demanded(
+; CHECK-NEXT:    [[Y_EXT:%.*]] = sext i8 [[X:%.*]] to i16
+; CHECK-NEXT:    [[SHR:%.*]] = lshr i16 [[Y_EXT]], 1
+; CHECK-NEXT:    ret i16 [[SHR]]
+;
+  %y = and i8 %x, -2
+  %y.ext = sext i8 %y to i16
+  %shr = lshr i16 %y.ext, 1
+  ret i16 %shr
+}
+
+define i16 @lshr_exact_and_not_demanded(i8 %x) {
+; CHECK-LABEL: @lshr_exact_and_not_demanded(
+; CHECK-NEXT:    [[Y:%.*]] = and i8 [[X:%.*]], -2
+; CHECK-NEXT:    [[Y_EXT:%.*]] = sext i8 [[Y]] to i16
+; CHECK-NEXT:    [[SHR:%.*]] = lshr exact i16 [[Y_EXT]], 1
+; CHECK-NEXT:    ret i16 [[SHR]]
+;
+  %y = and i8 %x, -2
+  %y.ext = sext i8 %y to i16
+  %shr = lshr exact i16 %y.ext, 1
+  ret i16 %shr
+}
+
+define i16 @lshr_and_demanded(i8 %x) {
+; CHECK-LABEL: @lshr_and_demanded(
+; CHECK-NEXT:    [[Y:%.*]] = and i8 [[X:%.*]], -4
+; CHECK-NEXT:    [[Y_EXT:%.*]] = sext i8 [[Y]] to i16
+; CHECK-NEXT:    [[SHR:%.*]] = lshr exact i16 [[Y_EXT]], 1
+; CHECK-NEXT:    ret i16 [[SHR]]
+;
+  %y = and i8 %x, -4
+  %y.ext = sext i8 %y to i16
+  %shr = lshr i16 %y.ext, 1
+  ret i16 %shr
+}
+
+define i16 @ashr_umax_not_demanded(i16 %x) {
+; CHECK-LABEL: @ashr_umax_not_demanded(
+; CHECK-NEXT:    [[SHR:%.*]] = ashr i16 [[X:%.*]], 1
+; CHECK-NEXT:    ret i16 [[SHR]]
+;
+  %y = call i16 @llvm.umax.i16(i16 %x, i16 1)
+  %shr = ashr i16 %y, 1
+  ret i16 %shr
+}
+
+define i16 @ashr_exact_umax_not_demanded(i16 %x) {
+; CHECK-LABEL: @ashr_exact_umax_not_demanded(
+; CHECK-NEXT:    [[Y:%.*]] = call i16 @llvm.umax.i16(i16 [[X:%.*]], i16 1)
+; CHECK-NEXT:    [[SHR:%.*]] = ashr exact i16 [[Y]], 1
+; CHECK-NEXT:    ret i16 [[SHR]]
+;
+  %y = call i16 @llvm.umax.i16(i16 %x, i16 1)
+  %shr = ashr exact i16 %y, 1
+  ret i16 %shr
+}
+
+define i16 @ashr_umax_demanded(i16 %x) {
+; CHECK-LABEL: @ashr_umax_demanded(
+; CHECK-NEXT:    [[Y:%.*]] = call i16 @llvm.umax.i16(i16 [[X:%.*]], i16 2)
+; CHECK-NEXT:    [[SHR:%.*]] = ashr i16 [[Y]], 1
+; CHECK-NEXT:    ret i16 [[SHR]]
+;
+  %y = call i16 @llvm.umax.i16(i16 %x, i16 2)
+  %shr = ashr i16 %y, 1
+  ret i16 %shr
+}
+
+declare i16 @llvm.umax.i16(i16, i16)