[llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)

[Michael Maitland via llvm-commits]

michaelmaitland wrote:

> Can we add some llvm-mca tests?

I have added them, but llvm-mca does not know how to give a correct report yet. I have confirmed that this change does work as expected on some internal benchmarks.

https://github.com/llvm/llvm-project/pull/70266