[llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)

[Jay Foad via llvm-commits]

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@@ -0,0 +1,388 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --filetype=null --run-pass=amdgpu-print-rp %s 2>&1 >/dev/null | FileCheck %s --check-prefix=RP --check-prefix=RPU
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --filetype=null --run-pass=amdgpu-print-rp -amdgpu-print-rp-downward %s 2>&1 >/dev/null | FileCheck %s --check-prefix=RP --check-prefix=RPD
+
+
+---
+name:  trivial
+tracksRegLiveness: true
+body:             |
+  ; RP-LABEL: name: trivial
+  ; RP: bb.0:
+  ; RP-NEXT:   Live-in:
+  ; RP-NEXT:   SGPR  VGPR
+  ; RP-NEXT:   0     0
+  ; RP-NEXT:   0     1      %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+  ; RP-NEXT:   0     1
+  ; RP-NEXT:   2     1      %1:sgpr_64 = IMPLICIT_DEF
+  ; RP-NEXT:   2     1
+  ; RP-NEXT:   Live-out: %0:0000000000000003 %1:000000000000000F
+  ; RP-NEXT:   Live-thr:
+  ; RP-NEXT: bb.1:
+  ; RP-NEXT:   Live-in:  %0:0000000000000003 %1:000000000000000F
+  ; RP-NEXT:   SGPR  VGPR
+  ; RP-NEXT:   2     1
+  ; RP-NEXT:   Live-out: %0:0000000000000003 %1:000000000000000F
+  ; RP-NEXT:   Live-thr: %0:0000000000000003 %1:000000000000000F
+  ; RP-NEXT: bb.2:
+  ; RP-NEXT:   Live-in:  %0:0000000000000003 %1:000000000000000F
+  ; RP-NEXT:   SGPR  VGPR
+  ; RP-NEXT:   2     1
+  ; RP-NEXT:   2     1      S_NOP 0, implicit %0:vgpr_32, implicit %1:sgpr_64
+  ; RP-NEXT:   0     0
+  ; RP-NEXT:   Live-out:
+  ; RP-NEXT:   Live-thr:
+  bb.0:
+    %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+    %1:sgpr_64 = IMPLICIT_DEF
+  bb.1:
+
+  bb.2:
+    S_NOP 0, implicit %0, implicit %1
+...
+
+# This testcase shows the problem with LiveIntervals: it doesn't create
+# subranges for undefined but used subregisters. Upward tracker is able to see
+# the use of undefined subregister and tracks it correctly.
----------------
jayfoad wrote:

Between the first V_MOV and the last S_NOP, only half of %0:vreg_64 is live so the allocator only needs to dedicate one VGPR to it. All other VGPRs can be reused for other things, so they should not contribute to the register pressure.

https://github.com/llvm/llvm-project/pull/70031