[llvm] 0a8f54c - [X86][GlobalISel] Add legalization of 64-bit G_ICMP for i686 (#69478)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 25 13:30:46 PDT 2023
Author: Evgenii Kudriashov
Date: 2023-10-25T22:30:42+02:00
New Revision: 0a8f54c3febd06364218a6f5f0810eb72e0265ae
URL: https://github.com/llvm/llvm-project/commit/0a8f54c3febd06364218a6f5f0810eb72e0265ae
DIFF: https://github.com/llvm/llvm-project/commit/0a8f54c3febd06364218a6f5f0810eb72e0265ae.diff
LOG: [X86][GlobalISel] Add legalization of 64-bit G_ICMP for i686 (#69478)
Added:
llvm/test/CodeGen/X86/fast-isel-fcmp.ll
llvm/test/CodeGen/X86/isel-icmp.ll
Modified:
llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
Removed:
llvm/test/CodeGen/X86/GlobalISel/cmp.ll
llvm/test/CodeGen/X86/fast-isel-cmp.ll
################################################################################
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index 104461cff0a91b7..03af2b9e537c0c5 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -255,7 +255,9 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
getActionDefinitionsBuilder(G_ICMP)
.legalForCartesianProduct({s8}, Is64Bit ? IntTypes64 : IntTypes32)
- .clampScalar(0, s8, s8);
+ .clampScalar(0, s8, s8)
+ .clampScalar(1, s8, sMaxScalar)
+ .scalarSameSizeAs(2, 1);
// bswap
getActionDefinitionsBuilder(G_BSWAP)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/cmp.ll b/llvm/test/CodeGen/X86/GlobalISel/cmp.ll
deleted file mode 100644
index c57278118b74723..000000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/cmp.ll
+++ /dev/null
@@ -1,172 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
-
-define i32 @test_icmp_eq_i8(i8 %a, i8 %b) {
-; ALL-LABEL: test_icmp_eq_i8:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpb %sil, %dil
-; ALL-NEXT: sete %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp eq i8 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_eq_i16(i16 %a, i16 %b) {
-; ALL-LABEL: test_icmp_eq_i16:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpw %si, %di
-; ALL-NEXT: sete %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp eq i16 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_eq_i64(i64 %a, i64 %b) {
-; ALL-LABEL: test_icmp_eq_i64:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpq %rsi, %rdi
-; ALL-NEXT: sete %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp eq i64 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_eq_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_eq_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: sete %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp eq i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_ne_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_ne_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: setne %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp ne i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_ugt_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_ugt_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: seta %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp ugt i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_uge_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_uge_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: setae %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp uge i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_ult_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_ult_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: setb %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp ult i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_ule_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_ule_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: setbe %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp ule i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_sgt_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_sgt_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: setg %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp sgt i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_sge_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_sge_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: setge %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp sge i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_slt_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_slt_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: setl %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp slt i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
-define i32 @test_icmp_sle_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_sle_i32:
-; ALL: # %bb.0:
-; ALL-NEXT: xorl %eax, %eax
-; ALL-NEXT: cmpl %esi, %edi
-; ALL-NEXT: setle %al
-; ALL-NEXT: andl $1, %eax
-; ALL-NEXT: retq
- %r = icmp sle i32 %a, %b
- %res = zext i1 %r to i32
- ret i32 %res
-}
-
diff --git a/llvm/test/CodeGen/X86/fast-isel-cmp.ll b/llvm/test/CodeGen/X86/fast-isel-fcmp.ll
similarity index 90%
rename from llvm/test/CodeGen/X86/fast-isel-cmp.ll
rename to llvm/test/CodeGen/X86/fast-isel-fcmp.ll
index 089e0c3a42bb985..c6ad2171aa89558 100644
--- a/llvm/test/CodeGen/X86/fast-isel-cmp.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-fcmp.ll
@@ -1276,164 +1276,3 @@ define zeroext i1 @fcmp_une3(float %x) {
%1 = fcmp une float %x, 0.000000e+00
ret i1 %1
}
-
-define zeroext i1 @icmp_eq2(i32 %x) {
-; SDAG-LABEL: icmp_eq2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: movb $1, %al
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_eq2:
-; FAST: ## %bb.0:
-; FAST-NEXT: movb $1, %al
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp eq i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_ne2(i32 %x) {
-; SDAG-LABEL: icmp_ne2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: xorl %eax, %eax
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_ne2:
-; FAST: ## %bb.0:
-; FAST-NEXT: xorl %eax, %eax
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp ne i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_ugt2(i32 %x) {
-; SDAG-LABEL: icmp_ugt2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: xorl %eax, %eax
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_ugt2:
-; FAST: ## %bb.0:
-; FAST-NEXT: xorl %eax, %eax
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp ugt i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_uge2(i32 %x) {
-; SDAG-LABEL: icmp_uge2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: movb $1, %al
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_uge2:
-; FAST: ## %bb.0:
-; FAST-NEXT: movb $1, %al
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp uge i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_ult2(i32 %x) {
-; SDAG-LABEL: icmp_ult2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: xorl %eax, %eax
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_ult2:
-; FAST: ## %bb.0:
-; FAST-NEXT: xorl %eax, %eax
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp ult i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_ule2(i32 %x) {
-; SDAG-LABEL: icmp_ule2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: movb $1, %al
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_ule2:
-; FAST: ## %bb.0:
-; FAST-NEXT: movb $1, %al
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp ule i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_sgt2(i32 %x) {
-; SDAG-LABEL: icmp_sgt2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: xorl %eax, %eax
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_sgt2:
-; FAST: ## %bb.0:
-; FAST-NEXT: xorl %eax, %eax
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp sgt i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_sge2(i32 %x) {
-; SDAG-LABEL: icmp_sge2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: movb $1, %al
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_sge2:
-; FAST: ## %bb.0:
-; FAST-NEXT: movb $1, %al
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp sge i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_slt2(i32 %x) {
-; SDAG-LABEL: icmp_slt2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: xorl %eax, %eax
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_slt2:
-; FAST: ## %bb.0:
-; FAST-NEXT: xorl %eax, %eax
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp slt i32 %x, %x
- ret i1 %1
-}
-
-define zeroext i1 @icmp_sle2(i32 %x) {
-; SDAG-LABEL: icmp_sle2:
-; SDAG: ## %bb.0:
-; SDAG-NEXT: movb $1, %al
-; SDAG-NEXT: retq
-;
-; FAST-LABEL: icmp_sle2:
-; FAST: ## %bb.0:
-; FAST-NEXT: movb $1, %al
-; FAST-NEXT: andb $1, %al
-; FAST-NEXT: movzbl %al, %eax
-; FAST-NEXT: retq
- %1 = icmp sle i32 %x, %x
- ret i1 %1
-}
-
diff --git a/llvm/test/CodeGen/X86/isel-icmp.ll b/llvm/test/CodeGen/X86/isel-icmp.ll
new file mode 100644
index 000000000000000..fa5dbaab7e970cc
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-icmp.ll
@@ -0,0 +1,723 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=SDAG-X64
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=FAST-X64
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc < %s -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=SDAG-X86
+; Allow fast-isel to fallback to selection dag on x86
+; RUN: llc < %s -fast-isel -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=FAST-X86
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X86
+
+define i32 @test_icmp_eq_i8(i8 %a, i8 %b) {
+; SDAG-X64-LABEL: test_icmp_eq_i8:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpb %sil, %dil
+; SDAG-X64-NEXT: sete %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_eq_i8:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpb %sil, %dil
+; FAST-X64-NEXT: sete %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_eq_i8:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpb %sil, %dil
+; GISEL-X64-NEXT: sete %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_eq_i8:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpb {{[0-9]+}}(%esp), %cl
+; SDAG-X86-NEXT: sete %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_eq_i8:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpb %al, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: sete %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_eq_i8:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpb %dl, %cl
+; GISEL-X86-NEXT: sete %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp eq i8 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_eq_i16(i16 %a, i16 %b) {
+; SDAG-X64-LABEL: test_icmp_eq_i16:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpw %si, %di
+; SDAG-X64-NEXT: sete %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_eq_i16:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpw %si, %di
+; FAST-X64-NEXT: sete %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_eq_i16:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpw %si, %di
+; GISEL-X64-NEXT: sete %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_eq_i16:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpw {{[0-9]+}}(%esp), %cx
+; SDAG-X86-NEXT: sete %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_eq_i16:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpw %ax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: sete %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_eq_i16:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpw %dx, %cx
+; GISEL-X86-NEXT: sete %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp eq i16 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_eq_i64(i64 %a, i64 %b) {
+; SDAG-X64-LABEL: test_icmp_eq_i64:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpq %rsi, %rdi
+; SDAG-X64-NEXT: sete %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_eq_i64:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpq %rsi, %rdi
+; FAST-X64-NEXT: sete %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_eq_i64:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpq %rsi, %rdi
+; GISEL-X64-NEXT: sete %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_eq_i64:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; SDAG-X86-NEXT: xorl {{[0-9]+}}(%esp), %edx
+; SDAG-X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: orl %edx, %ecx
+; SDAG-X86-NEXT: sete %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_eq_i64:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; FAST-X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; FAST-X86-NEXT: xorl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: orl %ecx, %eax
+; FAST-X86-NEXT: sete %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_eq_i64:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %edx, %edx
+; GISEL-X86-NEXT: xorl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: orl %eax, %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %edx, %ecx
+; GISEL-X86-NEXT: sete %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp eq i64 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_eq_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_eq_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: sete %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_eq_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: sete %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_eq_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: sete %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_eq_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: sete %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_eq_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: sete %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_eq_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: sete %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp eq i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_ne_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_ne_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: setne %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_ne_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: setne %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_ne_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: setne %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_ne_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: setne %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_ne_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: setne %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_ne_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: setne %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp ne i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_ugt_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_ugt_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: seta %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_ugt_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: seta %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_ugt_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: seta %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_ugt_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: seta %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_ugt_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: seta %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_ugt_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: seta %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp ugt i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_uge_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_uge_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: setae %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_uge_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: setae %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_uge_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: setae %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_uge_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: setae %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_uge_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: setae %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_uge_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: setae %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp uge i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_ult_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_ult_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: setb %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_ult_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: setb %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_ult_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: setb %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_ult_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: setb %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_ult_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: setb %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_ult_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: setb %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp ult i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_ule_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_ule_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: setbe %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_ule_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: setbe %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_ule_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: setbe %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_ule_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: setbe %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_ule_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: setbe %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_ule_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: setbe %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp ule i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_sgt_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_sgt_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: setg %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_sgt_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: setg %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_sgt_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: setg %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_sgt_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: setg %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_sgt_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: setg %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_sgt_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: setg %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp sgt i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_sge_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_sge_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: setge %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_sge_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: setge %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_sge_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: setge %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_sge_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: setge %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_sge_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: setge %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_sge_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: setge %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp sge i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_slt_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_slt_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: setl %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_slt_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: setl %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_slt_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: setl %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_slt_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: setl %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_slt_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: setl %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_slt_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: setl %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp slt i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
+
+define i32 @test_icmp_sle_i32(i32 %a, i32 %b) {
+; SDAG-X64-LABEL: test_icmp_sle_i32:
+; SDAG-X64: ## %bb.0:
+; SDAG-X64-NEXT: xorl %eax, %eax
+; SDAG-X64-NEXT: cmpl %esi, %edi
+; SDAG-X64-NEXT: setle %al
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_icmp_sle_i32:
+; FAST-X64: ## %bb.0:
+; FAST-X64-NEXT: cmpl %esi, %edi
+; FAST-X64-NEXT: setle %al
+; FAST-X64-NEXT: andb $1, %al
+; FAST-X64-NEXT: movzbl %al, %eax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_icmp_sle_i32:
+; GISEL-X64: ## %bb.0:
+; GISEL-X64-NEXT: xorl %eax, %eax
+; GISEL-X64-NEXT: cmpl %esi, %edi
+; GISEL-X64-NEXT: setle %al
+; GISEL-X64-NEXT: andl $1, %eax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_icmp_sle_i32:
+; SDAG-X86: ## %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: xorl %eax, %eax
+; SDAG-X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; SDAG-X86-NEXT: setle %al
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_icmp_sle_i32:
+; FAST-X86: ## %bb.0:
+; FAST-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: setle %al
+; FAST-X86-NEXT: andb $1, %al
+; FAST-X86-NEXT: movzbl %al, %eax
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_icmp_sle_i32:
+; GISEL-X86: ## %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: xorl %eax, %eax
+; GISEL-X86-NEXT: cmpl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: setle %al
+; GISEL-X86-NEXT: andl $1, %eax
+; GISEL-X86-NEXT: retl
+ %r = icmp sle i32 %a, %b
+ %res = zext i1 %r to i32
+ ret i32 %res
+}
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