[llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)

[Shengchen Kan via llvm-commits]

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@@ -406,11 +406,11 @@ bool LiveVariables::HandlePhysRegKill(Register Reg, MachineInstr *MI) {
   return true;
 }
 
-void LiveVariables::HandleRegMask(const MachineOperand &MO) {
+void LiveVariables::HandleRegMask(const MachineOperand &MO, unsigned NumRegs) {
   // Call HandlePhysRegKill() for all live registers clobbered by Mask.
   // Clobbered registers are always dead, sp there is no need to use
   // HandlePhysRegDef().
-  for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) {
+  for (unsigned Reg = 1; Reg != NumRegs; ++Reg) {
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KanRobert wrote:

I misunderstood your idea...

diff --git a/llvm/lib/CodeGen/LiveVariables.cpp b/llvm/lib/CodeGen/LiveVariables.cpp
index 6b983b6320c7..44e127151004 100644
--- a/llvm/lib/CodeGen/LiveVariables.cpp
+++ b/llvm/lib/CodeGen/LiveVariables.cpp
@@ -411,6 +411,9 @@ void LiveVariables::HandleRegMask(const MachineOperand &MO) {
   // Clobbered registers are always dead, sp there is no need to use
   // HandlePhysRegDef().
   for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) {
+    // Skip reserved regs.
+    if (MRI->isReserved(Reg))
+      continue;
     // Skip dead regs.
     if (!PhysRegDef[Reg] && !PhysRegUse[Reg])
       continue;

After testing, I find checking `MRI->isReserved(Reg)` does not improve compile time, instead, it will bring 0.2% instruction count regression.

https://github.com/llvm/llvm-project/pull/70222