[llvm] [AArch64] Clarify that Anyext is OK for MOPS instructions. NFC (PR #70298)

[David Green via llvm-commits]

https://github.com/davemgreen created https://github.com/llvm/llvm-project/pull/70298

The instruction should only read the bottom 8 bits of the register, so an anyext is OK here. Update the comment from zext->anyext to clarify.

Closes #70270

>From d65b62e58206d57992db7c843e4ff1d2993e43f2 Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Thu, 26 Oct 2023 08:59:19 +0100
Subject: [PATCH] [AArch64] Clarify that Anyext is OK for MOPS instructions.
 NFC

The instruction should only read the bottom 8 bits of the register, so an
anyext is OK here. Update the comment from zext->anyext to clarify.

Closes #70270
---
 llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 9fadc008de20628..6c1d25f62c21e76 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -1253,7 +1253,8 @@ bool AArch64LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
   }
   case Intrinsic::aarch64_mops_memset_tag: {
     assert(MI.getOpcode() == TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS);
-    // Zext the value to 64 bit
+    // Anyext the value being set to 64 bit (only the bottom 8 bits are read by
+    // the instruction).
     MachineIRBuilder MIB(MI);
     auto &Value = MI.getOperand(3);
     Register ZExtValueReg = MIB.buildAnyExt(LLT::scalar(64), Value).getReg(0);
@@ -1776,7 +1777,8 @@ bool AArch64LegalizerInfo::legalizeMemOps(MachineInstr &MI,
 
   // Tagged version MOPSMemorySetTagged is legalised in legalizeIntrinsic
   if (MI.getOpcode() == TargetOpcode::G_MEMSET) {
-    // Zext the value operand to 64 bit
+    // Anyext the value being set to 64 bit (only the bottom 8 bits are read by
+    // the instruction).
     auto &Value = MI.getOperand(1);
     Register ZExtValueReg =
         MIRBuilder.buildAnyExt(LLT::scalar(64), Value).getReg(0);