[llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)

[David Sherwood via llvm-commits]

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@@ -21017,6 +21017,21 @@ static SDValue performMSTORECombine(SDNode *N,
     }
   }
 
+  if (MST->isTruncatingStore()) {
+    if (SDValue Rshrnb = trySimplifySrlAddToRshrnb(Value, DAG, Subtarget)) {
+      EVT ValueVT = Value->getValueType(0);
+      EVT MemVT = MST->getMemoryVT();
+      if ((ValueVT == MVT::nxv8i16 && MemVT == MVT::nxv8i8) ||
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david-arm wrote:

I think you have similar checks in performSTORECombine. It would be nice to combine them somehow into a helper function and reuse the logic, perhaps something like

```
bool isHalvingTruncateOfLegalScalableType(MVT SrcVT, MVT DstVT) {
  return (SrcVT == MVT::nxv8i16 && DstVT == MVT::nxv8i8) ||
      (SrcVT == MVT::nxv4i32 && DstVT == MVT::nxv4i16) ||
      (SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
```

Also, I think I'd prefer we do this check before calling trySimplifySrlAddToRshrnb to prevent us doing unnecessary extra work and potentially creating nodes that we throw away. I realise we also do this in performSTORECombine, but it would be great to re-order the checks in that function too!



https://github.com/llvm/llvm-project/pull/70026