[llvm] f7de498 - [AArch64][GlobalISel] Fold variable into assert
Benjamin Kramer via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 26 11:39:30 PDT 2023
Author: Benjamin Kramer
Date: 2023-10-26T20:39:11+02:00
New Revision: f7de49840367f44a5a88cab2c652e84f7efbf8b0
URL: https://github.com/llvm/llvm-project/commit/f7de49840367f44a5a88cab2c652e84f7efbf8b0
DIFF: https://github.com/llvm/llvm-project/commit/f7de49840367f44a5a88cab2c652e84f7efbf8b0.diff
LOG: [AArch64][GlobalISel] Fold variable into assert
Avoids unused variable warnings in release builds. NFCI.
Added:
Modified:
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 9c5b34166ffaf81..45fc6b023887774 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -5659,8 +5659,8 @@ bool AArch64InstructionSelector::selectIndexedLoad(MachineInstr &MI,
Register WriteBack = Ld.getWritebackReg();
Register Base = Ld.getBaseReg();
Register Offset = Ld.getOffsetReg();
- LLT Ty = MRI.getType(Dst);
- assert(Ty.getSizeInBits() <= 128 && "Unexpected type for indexed load");
+ assert(MRI.getType(Dst).getSizeInBits() <= 128 &&
+ "Unexpected type for indexed load");
unsigned MemSize = Ld.getMMO().getMemoryType().getSizeInBytes();
unsigned Opc = 0;
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