[llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 24 19:49:30 PDT 2023


================
@@ -506,50 +507,97 @@ bool RISCVInstructionSelector::selectGlobalValue(
     return false;
   }
   case CodeModel::Small: {
-    // Must lie within a single 2 GiB address range and must lie between
-    // absolute addresses -2 GiB and +2 GiB. This generates the pattern (addi
-    // (lui %hi(sym)) %lo(sym)).
-    Register AddrHiDest = MRI.createVirtualRegister(&RISCV::GPRRegClass);
-    MachineInstr *AddrHi = MIB.buildInstr(RISCV::LUI)
-                               .addDef(AddrHiDest)
-                               .addGlobalAddress(GV, RISCVII::MO_HI);
-    if (!constrainSelectedInstRegOperands(*AddrHi, TII, TRI, RBI))
-      return false;
+    Register DefReg = MI.getOperand(0).getReg();
+    const LLT DefTy = MRI.getType(DefReg);
+    MachineInstr *Result = nullptr;
+
+    // When HWASAN is used and tagging of global variables is enabled
+    // they should be accessed via the GOT, since the tagged address of a global
+    // is incompatible with existing code models. This also applies to non-pic
+    // mode.
+    if (TM.isPositionIndependent() && GV->isDSOLocal() &&
+        !Subtarget->allowTaggedGlobals()) {
+      // Use PC-relative addressing to access the symbol. This generates the
+      // pattern (PseudoLLA sym), which expands to (addi (auipc %pcrel_hi(sym))
+      // %pcrel_lo(auipc)).
+      Result = MIB.buildInstr(RISCV::PseudoLLA)
+                   .addDef(DefReg)
+                   .addGlobalAddress(GV, 0);
+    } else if (Subtarget->allowTaggedGlobals() ||
+               (TM.isPositionIndependent() && !GV->isDSOLocal())) {
+      // Use PC-relative addressing to access the GOT for this symbol, then
+      // load the address from the GOT. This generates the pattern (PseudoLGA
+      // sym), which expands to (ld (addi (auipc %got_pcrel_hi(sym))
+      // %pcrel_lo(auipc))).
+      MachineFunction &MF = *MI.getParent()->getParent();
+      MachineMemOperand *MemOp =
+          MI.getParent()->getParent()->getMachineMemOperand(
----------------
arsenm wrote:

Reuse MF instead of all the getParents 

https://github.com/llvm/llvm-project/pull/70091


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