[llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)
KAWASHIMA Takahiro via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 25 06:38:21 PDT 2023
================
@@ -212,6 +212,27 @@ bool AArch64TTIImpl::areInlineCompatible(const Function *Caller,
return (CallerBits & CalleeBits) == CalleeBits;
}
+bool AArch64TTIImpl::areTypesABICompatible(
+ const Function *Caller, const Function *Callee,
+ const ArrayRef<Type *> &Types) const {
+
+ // We need to ensure that argument promotion does not attempt to promote
+ // pointers to fixed-length vector types larger than 128 bits like
+ // <8 x float> (and pointers to aggregate types which have such fixed-length
+ // vector type members) into the values of the pointees. Such vector types
+ // are used for SVE VLS but there is no ABI for SVE VLS arguments and the
+ // backend cannot lower such value arguments. The 128-bit fixed-length SVE
+ // types can be safely treated as 128-bit NEON types and they cannot be
+ // distinguished in IR.
+ if (!BaseT::areTypesABICompatible(Caller, Callee, Types))
+ return false;
+
----------------
kawashima-fj wrote:
Thanks. I added the `useSVEForFixedLengthVectors` check.
https://github.com/llvm/llvm-project/pull/70034
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