[llvm] fa7c50d - [RISCV] Rename hasFixedResult to willVLBeAVL [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2023-10-24T11:27:09-07:00
New Revision: fa7c50d00f0d95bd87553a5d12fa37ea95ab7d67

URL: https://github.com/llvm/llvm-project/commit/fa7c50d00f0d95bd87553a5d12fa37ea95ab7d67
DIFF: https://github.com/llvm/llvm-project/commit/fa7c50d00f0d95bd87553a5d12fa37ea95ab7d67.diff

LOG: [RISCV] Rename hasFixedResult to willVLBeAVL [nfc]

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 5584fa8d503dbe4..b6926854ce1f160 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1300,8 +1300,10 @@ void RISCVInsertVSETVLI::emitVSETVLIs(MachineBasicBlock &MBB) {
   }
 }
 
-/// Return true if the VL value configured must be equal to the requested one.
-static bool hasFixedResult(const VSETVLIInfo &Info, const RISCVSubtarget &ST) {
+/// Return true if the VL value configured by a vset(i)vli with the
+/// provided Info must be equal to the requested AVL.  That is, that
+/// AVL <= VLMAX.
+static bool willVLBeAVL(const VSETVLIInfo &Info, const RISCVSubtarget &ST) {
   if (!Info.hasAVLImm())
     // VLMAX is always the same value.
     // TODO: Could extend to other registers by looking at the associated vreg
@@ -1358,7 +1360,7 @@ void RISCVInsertVSETVLI::doPRE(MachineBasicBlock &MBB) {
     return;
 
   // If VL can be less than AVL, then we can't reduce the frequency of exec.
-  if (!hasFixedResult(AvailableInfo, ST))
+  if (!willVLBeAVL(AvailableInfo, ST))
     return;
 
   // Model the effect of changing the input state of the block MBB to