[llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 26 07:41:39 PDT 2023
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@@ -8430,8 +8442,16 @@ unsigned SIInstrInfo::getLiveRangeSplitOpcode(Register SrcReg,
}
bool SIInstrInfo::isBasicBlockPrologue(const MachineInstr &MI) const {
- return !MI.isTerminator() && MI.getOpcode() != AMDGPU::COPY &&
- MI.modifiesRegister(AMDGPU::EXEC, &RI);
+ // It should cover all possible instructions (spills, copies, etc.) early
+ // inserted during RA in the block prolog to avoid the broken prologs that
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arsenm wrote:
I think the "broken prolog" reads a bit too vaguely. Also not sure what "early" is doing here. How about
"We need to handle instructions which may be inserted during register allocation to handle the prolog. The initial prolog instruction may have been separated from the start of the block by spills and copies inserted needed by the prolog"
I still don't feel particularly comfortable trusting any spills here were for the prolog
https://github.com/llvm/llvm-project/pull/69924
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