[llvm] [AMDGPU] Fix legalization of frem(-0.0, y) (PR #70448)

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git-clang-format --diff 8e0b3a881401ed175691b7f4beac9d500c2341bd 8c60b73fbe2e16a769f0bacc8e8dc19cfd56ac57 -- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 28f6ad62f2c3..9564c191b0d1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -2283,7 +2283,7 @@ SDValue AMDGPUTargetLowering::LowerFREM(SDValue Op, SelectionDAG &DAG) const {
   SDValue Neg = DAG.getNode(ISD::FNEG, SL, VT, Trunc, Flags);
   // TODO: For f32 use FMAD instead if !hasFastFMA32?
   SDValue FMA = DAG.getNode(ISD::FMA, SL, VT, Neg, Y, X, Flags);
-  return NSZ ? FMA : DAG.getNode(ISD::FCOPYSIGN , SL, VT, FMA, X);
+  return NSZ ? FMA : DAG.getNode(ISD::FCOPYSIGN, SL, VT, FMA, X);
 }
 
 SDValue AMDGPUTargetLowering::LowerFCEIL(SDValue Op, SelectionDAG &DAG) const {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 0775d8a3c239..42d8721cd323 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -2343,7 +2343,7 @@ bool AMDGPULegalizerInfo::legalizeFceil(
 
 static bool allowNoSignedZeros(const MachineFunction &MF, unsigned Flags) {
   return (Flags & MachineInstr::FmNsz) ||
-      MF.getTarget().Options.NoSignedZerosFPMath;
+         MF.getTarget().Options.NoSignedZerosFPMath;
 }
 
 // Legalize frem(x, y) -> copysign(x - y * trunc(x / y), x)

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https://github.com/llvm/llvm-project/pull/70448