[llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)

[Paul Walker via llvm-commits]

https://github.com/paulwalker-arm updated https://github.com/llvm/llvm-project/pull/70315

>From 4eea128e492b56498de94a3755e996a596f62e61 Mon Sep 17 00:00:00 2001
From: Paul Walker <paul.walker at arm.com>
Date: Thu, 26 Oct 2023 13:11:02 +0000
Subject: [PATCH 1/2] [SVE] Add reproducer for stack corruption bug.

---
 llvm/test/CodeGen/AArch64/framelayout-sve.mir | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve.mir b/llvm/test/CodeGen/AArch64/framelayout-sve.mir
index 54d6a5fc1997660..9d3f8a85b82fe89 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve.mir
@@ -41,6 +41,7 @@
   define aarch64_sve_vector_pcs void @save_restore_sve_realign() uwtable { entry: unreachable }
   define aarch64_sve_vector_pcs void @frame_layout() uwtable { entry: unreachable }
   define void @fp_relative_index_with_float_save() uwtable { entry: unreachable }
+  define void @fp_relative_that_is_not_a_multiple_of_VLx16() uwtable { entry: unreachable }
 
 ...
 # +----------+
@@ -1287,3 +1288,28 @@ body:             |
 
     RET_ReallyLR
 ---
+...
+# CHECK-LABEL: name: fp_relative_that_is_not_a_multiple_of_VLx16
+# CHECK:         - { id: 0, name: '', type: default, offset: -50, size: 50, alignment: 2,
+# CHECK-NEXT:        stack-id: scalable-vector
+# CHECK:         - { id: 1, name: '', type: default, offset: -92, size: 40, alignment: 4,
+# CHECK-NEXT:        stack-id: scalable-vector
+# CHECK:         - { id: 2, name: '', type: default, offset: -102, size: 10, alignment: 2,
+# CHECK-NEXT:        stack-id: scalable-vector
+
+# CHECK:      $x8 = ADDVL_XXI $fp, -2
+# CHECK-NEXT: $z0 = LD1W_D_IMM killed renamable $p0, killed $x8, -8
+
+name:            fp_relative_that_is_not_a_multiple_of_VLx16
+stack:
+  - { id: 0, stack-id: scalable-vector, size: 50, alignment: 2 }
+  - { id: 1, stack-id: scalable-vector, size: 40, alignment: 4 }
+  - { id: 2, stack-id: scalable-vector, size: 10, alignment: 2 }
+  - { id: 3, stack-id: default, type: variable-sized, alignment: 1 }
+body:             |
+  bb.0.entry:
+    liveins: $p0
+
+    renamable $z0 = LD1W_D_IMM killed renamable $p0, %stack.1, 0
+    RET_ReallyLR
+---

>From 3134ca7622394eb5d7eea0f7271dae6a91e5639b Mon Sep 17 00:00:00 2001
From: Paul Walker <paul.walker at arm.com>
Date: Thu, 26 Oct 2023 10:50:47 +0000
Subject: [PATCH 2/2] [SVE] Fix incorrect offset calculation when rewriting an
 instruction's frame index.

---
 llvm/lib/Target/AArch64/AArch64InstrInfo.cpp  | 2 +-
 llvm/test/CodeGen/AArch64/framelayout-sve.mir | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 7f1421549b1492e..e9b9f8013abeaf6 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -5657,7 +5657,7 @@ int llvm::isAArch64FrameOffsetLegal(const MachineInstr &MI,
     Offset = Remainder;
   else {
     NewOffset = NewOffset < 0 ? MinOff : MaxOff;
-    Offset = Offset - NewOffset * Scale + Remainder;
+    Offset = Offset - NewOffset * Scale;
   }
 
   if (EmittableOffset)
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve.mir b/llvm/test/CodeGen/AArch64/framelayout-sve.mir
index 9d3f8a85b82fe89..d7340a1e99e9e85 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve.mir
@@ -1297,7 +1297,7 @@ body:             |
 # CHECK:         - { id: 2, name: '', type: default, offset: -102, size: 10, alignment: 2,
 # CHECK-NEXT:        stack-id: scalable-vector
 
-# CHECK:      $x8 = ADDVL_XXI $fp, -2
+# CHECK:      $x8 = ADDPL_XXI $fp, -14
 # CHECK-NEXT: $z0 = LD1W_D_IMM killed renamable $p0, killed $x8, -8
 
 name:            fp_relative_that_is_not_a_multiple_of_VLx16