[llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)

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git-clang-format --diff 11a7195b2fea6611d91b4969d321993982d8b2fe b1b172053ff41fe4013420b8278eba631526c1ed -- llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 3ec704c2d3d9..ff5d0e272772 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -14152,9 +14152,9 @@ void SITargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
       bool HasAGPRs = Info->mayNeedAGPRs();
       const SIRegisterInfo *TRI = Subtarget->getRegisterInfo();
       int16_t Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
-      for (auto I : {AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0),
-                     AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1),
-                     Src2Idx}) {
+      for (auto I :
+           {AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0),
+            AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1), Src2Idx}) {
         if (I == -1)
           break;
         if ((I == Src2Idx) && (HasAGPRs))

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https://github.com/llvm/llvm-project/pull/69720