[llvm] f386045 - [InstCombine] Test extra and use in processUMulZExtIdiom() fold (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2023-10-25T10:52:39+02:00
New Revision: f3860456407f5462e99b54b07dc7254acf38081e

URL: https://github.com/llvm/llvm-project/commit/f3860456407f5462e99b54b07dc7254acf38081e
DIFF: https://github.com/llvm/llvm-project/commit/f3860456407f5462e99b54b07dc7254acf38081e.diff

LOG: [InstCombine] Test extra and use in processUMulZExtIdiom() fold (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/overflow-mul.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/overflow-mul.ll b/llvm/test/Transforms/InstCombine/overflow-mul.ll
index 23dc542e54ba5e3..8b92eda402bca7e 100644
--- a/llvm/test/Transforms/InstCombine/overflow-mul.ll
+++ b/llvm/test/Transforms/InstCombine/overflow-mul.ll
@@ -11,6 +11,7 @@ target datalayout = "i32:8:8"
 ;    and i32 %mul, 252
 ; The mask is no longer in the form 2^n-1  and this prevents the transformation.
 
+declare void @use.i64(i64)
 
 ; return mul(zext x, zext y) > MAX
 define i32 @pr4917_1(i32 %x, i32 %y) nounwind {
@@ -279,3 +280,65 @@ entry:
   %retval = zext i1 %overflow to i32
   ret i32 %retval
 }
+
+define i32 @extra_and_use(i32 %x, i32 %y) {
+; CHECK-LABEL: @extra_and_use(
+; CHECK-NEXT:    [[UMUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT:    [[UMUL_VALUE:%.*]] = extractvalue { i32, i1 } [[UMUL]], 0
+; CHECK-NEXT:    [[AND:%.*]] = zext i32 [[UMUL_VALUE]] to i64
+; CHECK-NEXT:    [[OVERFLOW:%.*]] = extractvalue { i32, i1 } [[UMUL]], 1
+; CHECK-NEXT:    call void @use.i64(i64 [[AND]])
+; CHECK-NEXT:    [[RETVAL:%.*]] = zext i1 [[OVERFLOW]] to i32
+; CHECK-NEXT:    ret i32 [[RETVAL]]
+;
+  %l = zext i32 %x to i64
+  %r = zext i32 %y to i64
+  %mul64 = mul i64 %l, %r
+  %overflow = icmp ugt i64 %mul64, 4294967295
+  %and = and i64 %mul64, u0xffffffff
+  call void @use.i64(i64 %and)
+  %retval = zext i1 %overflow to i32
+  ret i32 %retval
+}
+
+define i32 @extra_and_use_small_mask(i32 %x, i32 %y) {
+; CHECK-LABEL: @extra_and_use_small_mask(
+; CHECK-NEXT:    [[UMUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT:    [[UMUL_VALUE:%.*]] = extractvalue { i32, i1 } [[UMUL]], 0
+; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[UMUL_VALUE]], 268435455
+; CHECK-NEXT:    [[AND:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT:    [[OVERFLOW:%.*]] = extractvalue { i32, i1 } [[UMUL]], 1
+; CHECK-NEXT:    call void @use.i64(i64 [[AND]])
+; CHECK-NEXT:    [[RETVAL:%.*]] = zext i1 [[OVERFLOW]] to i32
+; CHECK-NEXT:    ret i32 [[RETVAL]]
+;
+  %l = zext i32 %x to i64
+  %r = zext i32 %y to i64
+  %mul64 = mul i64 %l, %r
+  %overflow = icmp ugt i64 %mul64, 4294967295
+  %and = and i64 %mul64, u0xfffffff
+  call void @use.i64(i64 %and)
+  %retval = zext i1 %overflow to i32
+  ret i32 %retval
+}
+
+define i32 @extra_and_use_mask_too_large(i32 %x, i32 %y) {
+; CHECK-LABEL: @extra_and_use_mask_too_large(
+; CHECK-NEXT:    [[L:%.*]] = zext i32 [[X:%.*]] to i64
+; CHECK-NEXT:    [[R:%.*]] = zext i32 [[Y:%.*]] to i64
+; CHECK-NEXT:    [[MUL64:%.*]] = mul nuw i64 [[L]], [[R]]
+; CHECK-NEXT:    [[OVERFLOW:%.*]] = icmp ugt i64 [[MUL64]], 4294967295
+; CHECK-NEXT:    [[AND:%.*]] = and i64 [[MUL64]], 68719476735
+; CHECK-NEXT:    call void @use.i64(i64 [[AND]])
+; CHECK-NEXT:    [[RETVAL:%.*]] = zext i1 [[OVERFLOW]] to i32
+; CHECK-NEXT:    ret i32 [[RETVAL]]
+;
+  %l = zext i32 %x to i64
+  %r = zext i32 %y to i64
+  %mul64 = mul i64 %l, %r
+  %overflow = icmp ugt i64 %mul64, 4294967295
+  %and = and i64 %mul64, u0xfffffffff
+  call void @use.i64(i64 %and)
+  %retval = zext i1 %overflow to i32
+  ret i32 %retval
+}