[llvm] [CodeGen] Add a helper class to reuse `expandMBB`. NFC. (PR #70325)
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Thu Oct 26 06:25:35 PDT 2023
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``````````bash
git-clang-format --diff 1b6b4d6a08321fb914127dadcd6677dcd9b1b222 129d5f0ce14fb91df3f9302790217a87301fb128 -- llvm/include/llvm/CodeGen/ExpandPseudoInstsPass.h llvm/lib/CodeGen/ExpandPseudoInstsPass.cpp llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp llvm/lib/Target/M68k/M68kExpandPseudo.cpp llvm/lib/Target/Mips/MipsExpandPseudo.cpp llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp llvm/lib/Target/X86/X86ExpandPseudo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index 2830ae03cc78..4c27e5622ba6 100644
--- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -38,81 +38,77 @@ VerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden,
#define ARM_EXPAND_PSEUDO_NAME "ARM pseudo instruction expansion pass"
namespace {
- class ARMExpandPseudo : public ExpandPseudoInstsPass {
- public:
- static char ID;
- ARMExpandPseudo() : ExpandPseudoInstsPass(ID) {}
+class ARMExpandPseudo : public ExpandPseudoInstsPass {
+public:
+ static char ID;
+ ARMExpandPseudo() : ExpandPseudoInstsPass(ID) {}
- const ARMBaseInstrInfo *TII;
- const TargetRegisterInfo *TRI;
- const ARMSubtarget *STI;
- ARMFunctionInfo *AFI;
+ const ARMBaseInstrInfo *TII;
+ const TargetRegisterInfo *TRI;
+ const ARMSubtarget *STI;
+ ARMFunctionInfo *AFI;
- bool runOnMachineFunction(MachineFunction &Fn) override;
+ bool runOnMachineFunction(MachineFunction &Fn) override;
- MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
- }
-
- StringRef getPassName() const override {
- return ARM_EXPAND_PSEUDO_NAME;
- }
+ MachineFunctionProperties getRequiredProperties() const override {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::NoVRegs);
+ }
- private:
- bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
- MachineBasicBlock::iterator &NextMBBI) override;
- void ExpandVLD(MachineBasicBlock::iterator &MBBI);
- void ExpandVST(MachineBasicBlock::iterator &MBBI);
- void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
- void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
- unsigned Opc, bool IsExt);
- void ExpandMQQPRLoadStore(MachineBasicBlock::iterator &MBBI);
- void ExpandTMOV32BitImm(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI);
- void ExpandMOV32BitImm(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI);
- void CMSEClearGPRegs(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
- const SmallVectorImpl<unsigned> &ClearRegs,
- unsigned ClobberReg);
- MachineBasicBlock &CMSEClearFPRegs(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI);
- MachineBasicBlock &CMSEClearFPRegsV8(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- const BitVector &ClearRegs);
- MachineBasicBlock &CMSEClearFPRegsV81(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- const BitVector &ClearRegs);
- void CMSESaveClearFPRegs(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI, DebugLoc &DL,
- const LivePhysRegs &LiveRegs,
- SmallVectorImpl<unsigned> &AvailableRegs);
- void CMSESaveClearFPRegsV8(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI, DebugLoc &DL,
- const LivePhysRegs &LiveRegs,
- SmallVectorImpl<unsigned> &ScratchRegs);
- void CMSESaveClearFPRegsV81(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI, DebugLoc &DL,
- const LivePhysRegs &LiveRegs);
- void CMSERestoreFPRegs(MachineBasicBlock &MBB,
+ StringRef getPassName() const override { return ARM_EXPAND_PSEUDO_NAME; }
+
+private:
+ bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ MachineBasicBlock::iterator &NextMBBI) override;
+ void ExpandVLD(MachineBasicBlock::iterator &MBBI);
+ void ExpandVST(MachineBasicBlock::iterator &MBBI);
+ void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
+ void ExpandVTBL(MachineBasicBlock::iterator &MBBI, unsigned Opc, bool IsExt);
+ void ExpandMQQPRLoadStore(MachineBasicBlock::iterator &MBBI);
+ void ExpandTMOV32BitImm(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI);
+ void ExpandMOV32BitImm(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI);
+ void CMSEClearGPRegs(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL,
+ const SmallVectorImpl<unsigned> &ClearRegs,
+ unsigned ClobberReg);
+ MachineBasicBlock &CMSEClearFPRegs(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI);
+ MachineBasicBlock &CMSEClearFPRegsV8(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ const BitVector &ClearRegs);
+ MachineBasicBlock &CMSEClearFPRegsV81(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ const BitVector &ClearRegs);
+ void CMSESaveClearFPRegs(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, DebugLoc &DL,
+ const LivePhysRegs &LiveRegs,
SmallVectorImpl<unsigned> &AvailableRegs);
- void CMSERestoreFPRegsV8(MachineBasicBlock &MBB,
+ void CMSESaveClearFPRegsV8(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, DebugLoc &DL,
- SmallVectorImpl<unsigned> &AvailableRegs);
- void CMSERestoreFPRegsV81(MachineBasicBlock &MBB,
+ const LivePhysRegs &LiveRegs,
+ SmallVectorImpl<unsigned> &ScratchRegs);
+ void CMSESaveClearFPRegsV81(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, DebugLoc &DL,
- SmallVectorImpl<unsigned> &AvailableRegs);
- bool ExpandCMP_SWAP(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI, unsigned LdrexOp,
- unsigned StrexOp, unsigned UxtOp,
- MachineBasicBlock::iterator &NextMBBI);
-
- bool ExpandCMP_SWAP_64(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- MachineBasicBlock::iterator &NextMBBI);
- };
+ const LivePhysRegs &LiveRegs);
+ void CMSERestoreFPRegs(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI, DebugLoc &DL,
+ SmallVectorImpl<unsigned> &AvailableRegs);
+ void CMSERestoreFPRegsV8(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI, DebugLoc &DL,
+ SmallVectorImpl<unsigned> &AvailableRegs);
+ void CMSERestoreFPRegsV81(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI, DebugLoc &DL,
+ SmallVectorImpl<unsigned> &AvailableRegs);
+ bool ExpandCMP_SWAP(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ unsigned LdrexOp, unsigned StrexOp, unsigned UxtOp,
+ MachineBasicBlock::iterator &NextMBBI);
+
+ bool ExpandCMP_SWAP_64(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ MachineBasicBlock::iterator &NextMBBI);
+};
char ARMExpandPseudo::ID = 0;
}
diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index 9e9d7ba33db0..8bbc3739672f 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -30,43 +30,42 @@ using namespace llvm;
#define DEBUG_TYPE "mips-pseudo"
namespace {
- class MipsExpandPseudo : public ExpandPseudoInstsPass {
- public:
- static char ID;
- MipsExpandPseudo() : ExpandPseudoInstsPass(ID) {}
+class MipsExpandPseudo : public ExpandPseudoInstsPass {
+public:
+ static char ID;
+ MipsExpandPseudo() : ExpandPseudoInstsPass(ID) {}
- const MipsInstrInfo *TII;
- const MipsSubtarget *STI;
+ const MipsInstrInfo *TII;
+ const MipsSubtarget *STI;
- bool runOnMachineFunction(MachineFunction &Fn) override;
+ bool runOnMachineFunction(MachineFunction &Fn) override;
- MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
- }
+ MachineFunctionProperties getRequiredProperties() const override {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::NoVRegs);
+ }
- StringRef getPassName() const override {
- return "Mips pseudo instruction expansion pass";
- }
+ StringRef getPassName() const override {
+ return "Mips pseudo instruction expansion pass";
+ }
- private:
- bool expandAtomicCmpSwap(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- MachineBasicBlock::iterator &NextMBBI);
- bool expandAtomicCmpSwapSubword(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- MachineBasicBlock::iterator &NextMBBI);
-
- bool expandAtomicBinOp(MachineBasicBlock &BB,
- MachineBasicBlock::iterator I,
- MachineBasicBlock::iterator &NMBBI, unsigned Size);
- bool expandAtomicBinOpSubword(MachineBasicBlock &BB,
- MachineBasicBlock::iterator I,
- MachineBasicBlock::iterator &NMBBI);
-
- bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
- MachineBasicBlock::iterator &NMBB) override;
- };
+private:
+ bool expandAtomicCmpSwap(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ MachineBasicBlock::iterator &NextMBBI);
+ bool expandAtomicCmpSwapSubword(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ MachineBasicBlock::iterator &NextMBBI);
+
+ bool expandAtomicBinOp(MachineBasicBlock &BB, MachineBasicBlock::iterator I,
+ MachineBasicBlock::iterator &NMBBI, unsigned Size);
+ bool expandAtomicBinOpSubword(MachineBasicBlock &BB,
+ MachineBasicBlock::iterator I,
+ MachineBasicBlock::iterator &NMBBI);
+
+ bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ MachineBasicBlock::iterator &NMBB) override;
+};
char MipsExpandPseudo::ID = 0;
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/70325
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