[llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)

[Christudasan Devadasan via llvm-commits]

cdevadas wrote:

> I think the change is necessary even without considering the context here. Basically we need to use a different opcode so that we can still differentiate the writelane for SGPR spill from the ones lowered from llvm.amdgcn.write.lane. See the test changes of the test: llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll

Yes, I believe having a separate spill pseudo for SGPR spill to VGPRs would be appropriate. I don't think it is wise to depend on the comment flags for significant CodeGen decisions.

https://github.com/llvm/llvm-project/pull/69923