[llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 26 09:21:13 PDT 2023
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@@ -1259,15 +1260,16 @@ define <4 x i16> @mgather_truemask_v4i16(<4 x ptr> %ptrs, <4 x i16> %passthru) {
; RV64ZVE32F-NEXT: .LBB20_5: # %cond.load
; RV64ZVE32F-NEXT: ld a2, 0(a0)
; RV64ZVE32F-NEXT: lh a2, 0(a2)
-; RV64ZVE32F-NEXT: vsetivli zero, 4, e16, mf2, tu, ma
+; RV64ZVE32F-NEXT: vsetvli zero, zero, e16, m1, tu, ma
; RV64ZVE32F-NEXT: vmv.s.x v8, a2
; RV64ZVE32F-NEXT: andi a2, a1, 2
; RV64ZVE32F-NEXT: beqz a2, .LBB20_2
; RV64ZVE32F-NEXT: .LBB20_6: # %cond.load1
; RV64ZVE32F-NEXT: ld a2, 8(a0)
; RV64ZVE32F-NEXT: lh a2, 0(a2)
-; RV64ZVE32F-NEXT: vsetivli zero, 2, e16, mf2, tu, ma
+; RV64ZVE32F-NEXT: vsetvli zero, zero, e16, m1, ta, ma
; RV64ZVE32F-NEXT: vmv.s.x v9, a2
+; RV64ZVE32F-NEXT: vsetivli zero, 2, e16, mf2, tu, ma
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preames wrote:
To flag - we're actually adding a vsetvli which didn't exist. This is arguably a regression, but a pretty minor one since the "added" vsetvli is effectively a vtype toggle (i.e. the line I commented on "moved"). I think this also goes away once the patch on review for doing this in the backwards pass lands.
https://github.com/llvm/llvm-project/pull/69788
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