[llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)

[Michael Maitland via llvm-commits]

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@@ -0,0 +1,65 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -mtriple=riscv64 -run-pass=instruction-select -code-model=small \
+# RUN:   %s -o - | FileCheck --check-prefix=RV64-SMALL %s
+# RUN: llc -mtriple=riscv64 -run-pass=instruction-select -code-model=medium \
+# RUN:   %s -o - | FileCheck --check-prefix=RV64-MED %s
+
+--- |
+  @x = global i32 0, align 4
+  define ptr @global_addr() {
+  entry:
+    ret ptr @x
+  }
+  @y = external global i32, align 4
+  define ptr @extern_global_addr() {
+  entry:
+    ret ptr @y
+  }
+...
+---
+name:            global_addr
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gprb, preferred-register: '' }
+body:             |
+  bb.1.entry:
+    ; RV64-SMALL-LABEL: name: global_addr
+    ; RV64-SMALL: [[LUI:%[0-9]+]]:gpr = LUI @x + 4
+    ; RV64-SMALL-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @x
+    ; RV64-SMALL-NEXT: $x10 = COPY [[ADDI]]
+    ; RV64-SMALL-NEXT: PseudoRET implicit $x10
+    ;
+    ; RV64-MED-LABEL: name: global_addr
+    ; RV64-MED: [[PseudoLLA:%[0-9]+]]:gpr = PseudoLLA @x
+    ; RV64-MED-NEXT: $x10 = COPY [[PseudoLLA]]
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michaelmaitland wrote:

This isn't quite right. I need to take another look.

https://github.com/llvm/llvm-project/pull/70091