[llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)

[Carl Ritson via llvm-commits]

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@@ -3907,7 +3915,9 @@ bool SIInstrInfo::hasUnwantedEffectsWhenEXECEmpty(const MachineInstr &MI) const
   // However, executing them with EXEC = 0 causes them to operate on undefined
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perlfu wrote:

I notice this comment is only really accurate for V_READFIRSTLANE which depends on EXEC.
readlane and writelane are well defined with EXEC=0 -- just we have other reasons for not running them.
If we are sure we want to include spill/reload here then they should probably be documented with a separate comment, because really we are avoiding these in EXEC=0 because it means a code branch should be run for *any* scalar operation.

https://github.com/llvm/llvm-project/pull/69923