[llvm] [AMDGPU] Remove unnecessary conditionality on atomic CSUB pseudo-ops (PR #69914)
Stephen Thomas via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 23 03:35:57 PDT 2023
https://github.com/stepthomas created https://github.com/llvm/llvm-project/pull/69914
The pseudo-ops for BUFFER_ATOMIC_CSUB and GLOBAL_ATOMIC_CSUB should not
be conditional on FeatureAtomicCSubNoRtnInsts, as that feature rightly
should only control whether or not the non-returning forms are available
for instruction selection, not whether they exist or not.
Change-Id: Icb2fcdcf6c7bc55e48b522d0eec8dd35637c768e
>From c166bb9d6ae8fd1a4213403dbb0495bce43331dc Mon Sep 17 00:00:00 2001
From: Stephen Thomas <Stephen.Thomas at amd.com>
Date: Mon, 23 Oct 2023 11:24:11 +0100
Subject: [PATCH] [AMDGPU] Remove unnecessary conditionality on atomic CSUB
pseudo-ops
The pseudo-ops for BUFFER_ATOMIC_CSUB and GLOBAL_ATOMIC_CSUB should not
be conditional on FeatureAtomicCSubNoRtnInsts, as that feature rightly
should only control whether or not the non-returning forms are available
for instruction selection, not whether they exist or not.
Change-Id: Icb2fcdcf6c7bc55e48b522d0eec8dd35637c768e
---
llvm/lib/Target/AMDGPU/BUFInstructions.td | 7 +------
llvm/lib/Target/AMDGPU/FLATInstructions.td | 6 +-----
2 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/BUFInstructions.td b/llvm/lib/Target/AMDGPU/BUFInstructions.td
index e1bdf0e3bc1bf29..897bbfa5c58bee2 100644
--- a/llvm/lib/Target/AMDGPU/BUFInstructions.td
+++ b/llvm/lib/Target/AMDGPU/BUFInstructions.td
@@ -1047,14 +1047,9 @@ defm BUFFER_ATOMIC_DEC_X2 : MUBUF_Pseudo_Atomics <
>;
let SubtargetPredicate = HasGFX10_BEncoding in {
- defm BUFFER_ATOMIC_CSUB : MUBUF_Pseudo_Atomics_RTN <
+ defm BUFFER_ATOMIC_CSUB : MUBUF_Pseudo_Atomics <
"buffer_atomic_csub", VGPR_32, i32, int_amdgcn_global_atomic_csub
>;
-
- let OtherPredicates = [HasAtomicCSubNoRtnInsts] in
- defm BUFFER_ATOMIC_CSUB : MUBUF_Pseudo_Atomics_NO_RTN <
- "buffer_atomic_csub", VGPR_32, i32
- >;
}
let SubtargetPredicate = isGFX8GFX9 in {
diff --git a/llvm/lib/Target/AMDGPU/FLATInstructions.td b/llvm/lib/Target/AMDGPU/FLATInstructions.td
index 533013a3130c05f..52c1c6230cd5541 100644
--- a/llvm/lib/Target/AMDGPU/FLATInstructions.td
+++ b/llvm/lib/Target/AMDGPU/FLATInstructions.td
@@ -871,12 +871,8 @@ defm GLOBAL_ATOMIC_DEC_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_dec_x2",
VReg_64, i64>;
let SubtargetPredicate = HasGFX10_BEncoding in {
- defm GLOBAL_ATOMIC_CSUB : FLAT_Global_Atomic_Pseudo_RTN <"global_atomic_csub",
+ defm GLOBAL_ATOMIC_CSUB : FLAT_Global_Atomic_Pseudo <"global_atomic_csub",
VGPR_32, i32>;
-
- let OtherPredicates = [HasAtomicCSubNoRtnInsts] in
- defm GLOBAL_ATOMIC_CSUB : FLAT_Global_Atomic_Pseudo_NO_RTN <"global_atomic_csub",
- VGPR_32, i32>;
}
defm GLOBAL_LOAD_LDS_UBYTE : FLAT_Global_Load_LDS_Pseudo <"global_load_lds_ubyte">;
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