The Week Of Monday 2 September 2024 Archives by author
Starting: Mon Sep 2 00:00:58 PDT 2024
Ending: Sun Sep 8 23:50:54 PDT 2024
Messages: 5486
- [llvm] [AMDGPU][Docs] Update product names for some targets (PR #106973)
Aarni Koskela via llvm-commits
- [llvm] [AMDGPU][Docs] Update product names for some targets (PR #106973)
Aarni Koskela via llvm-commits
- [clang] [compiler-rt] [libcxx] [lldb] [llvm] Rename Sanitizer Coverage => Coverage Sanitizer (PR #106505)
Aaron Ballman via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
Aaron Ballman via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
Aaron Ballman via llvm-commits
- [clang] [compiler-rt] [libcxx] [lldb] [llvm] Rename Sanitizer Coverage => Coverage Sanitizer (PR #106505)
Aaron Ballman via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Aaron Ballman via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Aaron Ballman via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Aaron Ballman via llvm-commits
- [clang] [llvm] [NFC][SystemZ][z/OS] Rename autoconversion-related functions to be less generic (PR #107399)
Abhina Sree via llvm-commits
- [clang] [llvm] [SystemZ][z/OS] Update autoconversion functions to improve support for UTF-8 (PR #98652)
Abhina Sree via llvm-commits
- [clang] [llvm] [NFC][SystemZ][z/OS] Rename autoconversion-related functions to be less generic (PR #107399)
Abhina Sree via llvm-commits
- [llvm] [MC] Introduce ability to add target specific AsmStreamer (PR #107415)
Abhina Sree via llvm-commits
- [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)
Abhina Sree via llvm-commits
- [flang] [llvm] [mlir] [OpenMPIRBuilder] Don't drop debug info for target region. (PR #80692)
Abid Qadeer via llvm-commits
- [flang] [llvm] [mlir] [OpenMPIRBuilder] Don't drop debug info for target region. (PR #80692)
Abid Qadeer via llvm-commits
- [flang] [llvm] [mlir] [OpenMPIRBuilder] Don't drop debug info for target region. (PR #80692)
Abid Qadeer via llvm-commits
- [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)
Abinaya Saravanan via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
Aditi Medhane via llvm-commits
- [llvm] [NFC] Add explicit #include llvm-config.h where its macros are used. (PR #106621)
Aiden Grossman via llvm-commits
- [llvm] workflows/release-binaries: Fix automatic upload (PR #107315)
Aiden Grossman via llvm-commits
- [llvm] [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (PR #107427)
Aiden Grossman via llvm-commits
- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
Aiden Grossman via llvm-commits
- [compiler-rt] Add infrastructure for testing cpuid builtins (PR #101927)
Aiden Grossman via llvm-commits
- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
Aiden Grossman via llvm-commits
- [flang] [llvm] [mlir] [OpenMP]Update use_device_clause lowering (PR #101707)
Akash Banerjee via llvm-commits
- [flang] [llvm] [mlir] [OpenMP]Update use_device_clause lowering (PR #101707)
Akash Banerjee via llvm-commits
- [flang] [llvm] [OpenMP][Flang] Fix dynamic-extent array mapping (PR #107247)
Akash Banerjee via llvm-commits
- [flang] [llvm] [OpenMP][Flang] Fix dynamic-extent array mapping (PR #107247)
Akash Banerjee via llvm-commits
- [flang] [llvm] [OpenMP][Flang] Fix dynamic-extent array mapping (PR #107247)
Akash Banerjee via llvm-commits
- [llvm] [AMDGPU][NewPM] Have consistent property changes in GCNDPPCombine (PR #106520)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Have consistent property changes in GCNDPPCombine (PR #106520)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Akshat Oke via llvm-commits
- [llvm] [MachineLICM] Remove dead flag PreRegAlloc (PR #107222)
Akshat Oke via llvm-commits
- [llvm] [MachineLICM] Remove dead flag PreRegAlloc (PR #107222)
Akshat Oke via llvm-commits
- [llvm] [MachineLICM] Remove dead flag PreRegAlloc (PR #107222)
Akshat Oke via llvm-commits
- [llvm] [NewPM][MachineLICM] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][MachineLICM] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][MachineLICM] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][MachineLICM] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][MachineLICM] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
Akshat Oke via llvm-commits
- [llvm] [RuntimeDyld][Windows] Allocate space for dllimport things. (PR #102586)
Alastair Houghton via llvm-commits
- [llvm] Revert "[RuntimeDyld][Windows] Allocate space for dllimport things." (PR #106954)
Alastair Houghton via llvm-commits
- [llvm] Revert "[RuntimeDyld][Windows] Allocate space for dllimport things." (PR #106954)
Alastair Houghton via llvm-commits
- [llvm] Revert "[RuntimeDyld][Windows] Allocate space for dllimport things." (PR #106954)
Alastair Houghton via llvm-commits
- [llvm] [RuntimeDyld][Windows] Allocate space for dllimport things. (PR #106958)
Alastair Houghton via llvm-commits
- [llvm] [RuntimeDyld][Windows] Allocate space for dllimport things. (PR #106958)
Alastair Houghton via llvm-commits
- [llvm] [RuntimeDyld][Windows] Allocate space for dllimport things. (PR #106958)
Alastair Houghton via llvm-commits
- [llvm] [IRCE] Relax profitability check (PR #104659)
Aleksandr Popov via llvm-commits
- [llvm] [IRCE] Relax profitability check (PR #104659)
Aleksandr Popov via llvm-commits
- [llvm] [NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handeling (PR #107655)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handeling (PR #107655)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)
Alex MacLean via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][Mips] Bail on underaligned loads/stores in FastISel. (PR #106231)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][Mips] Bail on underaligned loads/stores in FastISel. (PR #106231)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][Mips] Bail on underaligned loads/stores in FastISel. (PR #106231)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (PR #107038)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (PR #107038)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)
Alex Rønne Petersen via llvm-commits
- [llvm] [CSKY] Fix some typos in CPU feature descriptions. (PR #105774)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Consistently respect `naked` fn attribute in `TargetFrameLowering::hasFP()` (PR #106014)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][Mips] Bail on underaligned loads/stores in FastISel. (PR #106231)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (PR #107038)
Alex Rønne Petersen via llvm-commits
- [llvm] [CSKY] Fix some typos in CPU feature descriptions. (PR #105774)
Alex Rønne Petersen via llvm-commits
- [llvm] [CSKY] Fix some typos in CPU feature descriptions. (PR #105774)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alex Rønne Petersen via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alex Rønne Petersen via llvm-commits
- [clang] [llvm] [llvm][Triple] Add `Environment` members and parsing for glibc/musl parity. (PR #107664)
Alex Rønne Petersen via llvm-commits
- [clang] [llvm] [llvm][Triple] Add `Environment` members and parsing for glibc/musl parity. (PR #107664)
Alex Rønne Petersen via llvm-commits
- [llvm] [CSKY] Fix some typos in CPU feature descriptions (NFC) (PR #105774)
Alex Rønne Petersen via llvm-commits
- [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)
Alex Voicu via llvm-commits
- [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)
Alex Voicu via llvm-commits
- [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)
Alex Voicu via llvm-commits
- [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)
Alex Voicu via llvm-commits
- [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)
Alex Voicu via llvm-commits
- [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)
Alex Voicu via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
Alexander Richardson via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
Alexander Richardson via llvm-commits
- [lld] [ELF][WASM] Update datalayout strings to latest version (PR #107276)
Alexander Richardson via llvm-commits
- [llvm] added a script to update llvm-mc test file (PR #107246)
Alexander Richardson via llvm-commits
- [llvm] added a script to update llvm-mc test file (PR #107246)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Simplify definition of uptr (PR #106155)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Simplify definition of uptr (PR #106155)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Work around incompatible Windows definitions of (S)SIZE_T (PR #106311)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Work around incompatible Windows definitions of (S)SIZE_T (PR #106311)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)
Alexander Richardson via llvm-commits
- [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl following msan's example (PR #107313)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl (PR #107313)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl (PR #107313)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl (PR #107313)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl (PR #107313)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl (PR #107313)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] eacda48 - [compiler-rt][builtins] Delete test __compiler_rt_fmaxf
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Alexander Yermolovich via llvm-commits
- [llvm] Win release packaging: Don't try to use rpmalloc for 32-bit x86 (PR #106969)
Alexandre Ganea via llvm-commits
- [clang] [llvm] [CodeView] Flatten cmd args in frontend for LF_BUILDINFO (PR #106369)
Alexandre Ganea via llvm-commits
- [clang] [llvm] [CodeView] Flatten cmd args in frontend for LF_BUILDINFO (PR #106369)
Alexandre Ganea via llvm-commits
- [clang] [llvm] [CodeView] Flatten cmd args in frontend for LF_BUILDINFO (PR #106369)
Alexandre Ganea via llvm-commits
- [llvm] Reland [AArch64][AsmParser] Directives should clear transitively implied features (#106625) (PR #106850)
Alexandros Lamprineas via llvm-commits
- [llvm] Reland [AArch64][AsmParser] Directives should clear transitively implied features (#106625) (PR #106850)
Alexandros Lamprineas via llvm-commits
- [llvm] Reland [AArch64][AsmParser] Directives should clear transitively implied features (#106625) (PR #106850)
Alexandros Lamprineas via llvm-commits
- [llvm] f381cd0 - [SLP]Fix PR107036: Check if the type of the user is sizable before requesting its size.
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] Support more mask pattern usage in shufflevector. (PR #106212)
Alexey Bataev via llvm-commits
- [llvm] b74e09c - [SLP]Check for the whole vector vectorization in unique scalars analysis
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] Use DenseMap::operator[] (NFC) (PR #107123)
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] Use DenseMap::operator[] (NFC) (PR #107123)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] Use DenseMap::operator[] (NFC) (PR #107123)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Alexey Bataev via llvm-commits
- [llvm] 884d7c1 - Revert "[SLP]Check for the whole vector vectorization in unique scalars analysis"
Alexey Bataev via llvm-commits
- [llvm] 571c8c2 - Revert "[SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands."
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] Avoid two successive hash lookups on the same key (PR #107143)
Alexey Bataev via llvm-commits
- [llvm] 98bb354 - [SLP]Fix PR107037: correctly track origonal/modified after vectorizations reduced values
Alexey Bataev via llvm-commits
- [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)
Alexey Bataev via llvm-commits
- [llvm] dce73e1 - Revert "[SLP]Fix PR107037: correctly track origonal/modified after vectorizations reduced values"
Alexey Bataev via llvm-commits
- [llvm] af1e59a - [SLP]Fix PR107037: correctly track origonal/modified after vectorizations reduced values
Alexey Bataev via llvm-commits
- [llvm] d65ff3e - [SLP]Fix PR107198: add a check for empty complex type
Alexey Bataev via llvm-commits
- [llvm] 2092f35 - [SLP][NFC]Remove unsupported attribute
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Vectorize of gathered loads (PR #107461)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Vectorize of gathered loads (PR #107461)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Vectorize of gathered loads (PR #107461)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Vectorize of gathered loads (PR #107461)
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] Avoid repeated hash lookups (NFC) (PR #107491)
Alexey Bataev via llvm-commits
- [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Move some of X86 tests to common directory (PR #107587)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Move some of X86 tests to common directory (PR #107587)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Move some of X86 tests to common directory (PR #107587)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Alexey Bataev via llvm-commits
- [llvm] [LV] Added verification of EVL recipes (PR #107630)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Alexey Bataev via llvm-commits
- [llvm] [LLD] Avoid non-deterministic relocations processing. (PR #107186)
Alexey Lapshin via llvm-commits
- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
Alina Sbirlea via llvm-commits
- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
Alina Sbirlea via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Alina Sbirlea via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Alina Sbirlea via llvm-commits
- [llvm] [SandboxIR][Bench] Test RAUW (PR #107440)
Alina Sbirlea via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Alina Sbirlea via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [AArch64] Remove redundant COPY from loadRegFromStackSlot (PR #107396)
Amara Emerson via llvm-commits
- [llvm] [AArch64] Remove redundant COPY from loadRegFromStackSlot (PR #107396)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Amara Emerson via llvm-commits
- [llvm] [BOLT][NFC] Define getCommonName (PR #106243)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Strip suffix in getLTOCommonName (PR #106243)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Strip suffix in getLTOCommonName (PR #106243)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Drop suffixes in parsePseudoProbe GUID assignment (PR #106243)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Drop suffixes in parsePseudoProbe GUID assignment (PR #106243)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][YAML] Allow unknown keys in the input (PR #100824)
Amir Ayupov via llvm-commits
- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
Amr Hesham via llvm-commits
- [llvm] [llvm][Docs] Update guide to include ``pip install lit`` (PR #106526)
Anatoly Trosinenko via llvm-commits
- [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)
Anchu Rajendran S via llvm-commits
- [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)
Andreas Jonson via llvm-commits
- [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)
Andreas Jonson via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Andreas Jonson via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Andreas Jonson via llvm-commits
- [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)
Andrei Safronov via llvm-commits
- [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)
Andrei Safronov via llvm-commits
- [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)
Andrei Safronov via llvm-commits
- [llvm] [LLD] Avoid non-deterministic relocations processing. (PR #107186)
Andrew Ng via llvm-commits
- [llvm] [LLD] Avoid non-deterministic relocations processing. (PR #107186)
Andrew Ng via llvm-commits
- [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)
Andrew Ng via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
Andrii Nakryiko via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
Andrii Nakryiko via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [CGP] Undo constant propagation of pointers across calls (PR #102926)
Antonio Frighetto via llvm-commits
- [llvm] [CGP] Undo constant propagation of pointers across calls (PR #102926)
Antonio Frighetto via llvm-commits
- [llvm] [CGP] Undo constant propagation of pointers across calls (PR #102926)
Antonio Frighetto via llvm-commits
- [llvm] ed6d9f6 - [CGP] Introduce test for PR102926 (NFC)
Antonio Frighetto via llvm-commits
- [llvm] e4e0dfb - [CGP] Undo constant propagation of pointers across calls
Antonio Frighetto via llvm-commits
- [llvm] [CGP] Undo constant propagation of pointers across calls (PR #102926)
Antonio Frighetto via llvm-commits
- [llvm] d79c4c1 - [CGP] Regenerate `revert-constant-ptr-propagation-on-calls.ll` test (NFC)
Antonio Frighetto via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Antonio Frighetto via llvm-commits
- [llvm] [MemCpyOpt] Drop dead `memmove` calls on `memset`'d source data (PR #101930)
Antonio Frighetto via llvm-commits
- [llvm] [MemCpyOpt] Drop dead `memmove` calls on `memset`'d source data (PR #101930)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] e80f489 - [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds
Antonio Frighetto via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Antonio Frighetto via llvm-commits
- [llvm] [SROA] Conservatively do not split the alloca if ptr is laundered (PR #107557)
Antonio Frighetto via llvm-commits
- [llvm] [SROA] Conservatively do not split the alloca if ptr is laundered (PR #107557)
Antonio Frighetto via llvm-commits
- [llvm] [SROA] Conservatively do not split the alloca if ptr is laundered (PR #107557)
Antonio Frighetto via llvm-commits
- [clang] [llvm] Fix build errors with a `LLVM_ENABLE_MODULES=ON` build (PR #107654)
Argyrios Kyrtzidis via llvm-commits
- [clang] [llvm] Fix build errors with a `LLVM_ENABLE_MODULES=ON` build (PR #107654)
Argyrios Kyrtzidis via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve copy avoidance during lowering. (PR #106423)
Artem Belevich via llvm-commits
- [llvm] [gn build] Add missing llvm-strings dependency to check-lld (PR #106896)
Arthur Eubanks via llvm-commits
- [llvm] [NFC][opt] Rename VerifierKind enums (PR #106789)
Arthur Eubanks via llvm-commits
- [clang] [llvm] [PGO][Pipeline] Enable PGOForceFunctionAttrs in PGO optimization pipelines (PR #106790)
Arthur Eubanks via llvm-commits
- [clang] [llvm] [PGO][Pipeline] Enable PGOForceFunctionAttrs in PGO optimization pipelines (PR #106790)
Arthur Eubanks via llvm-commits
- [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)
Arthur Eubanks via llvm-commits
- [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)
Arthur Eubanks via llvm-commits
- [llvm] [VPlan] Implement VPWidenCallRecipe::computeCost (NFCI). (PR #106047)
Arthur Eubanks via llvm-commits
- [llvm] [IR] Remove unused MINARITY operand trait tpl args, NFC (PR #107165)
Arthur Eubanks via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Arthur Eubanks via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Arthur Eubanks via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxVec] Early return checks (PR #107465)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxVec] Early return checks (PR #107465)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxIR] Add bazel support (PR #107486)
Arthur Eubanks via llvm-commits
- [llvm] [SandboxIR] Add bazel support (PR #107486)
Arthur Eubanks via llvm-commits
- [llvm] Attempt to fix: Sporadic Test Failure in thread.condition.condvarany/notify_one.pass.cpp (PR #106880)
Arup Chauhan via llvm-commits
- [llvm] Attempt to fix: Sporadic Test Failure in thread.condition.condvarany/notify_one.pass.cpp (PR #106880)
Arup Chauhan via llvm-commits
- [llvm] Attempt to fix: Sporadic Test Failure in thread.condition.condvarany/notify_one.pass.cpp (PR #106880)
Arup Chauhan via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Austin Kerbow via llvm-commits
- [llvm] [SROA] Use SetVector for PromotableAllocas (PR #105809)
Bartłomiej Chmiel via llvm-commits
- [llvm] [SROA] Use SetVector for PromotableAllocas (PR #105809)
Bartłomiej Chmiel via llvm-commits
- [llvm] [SROA] Use SetVector for PromotableAllocas (PR #105809)
Bartłomiej Chmiel via llvm-commits
- [llvm] [orc] Avoid pathological propogation order (PR #107488)
Ben Langmuir via llvm-commits
- [llvm] [AVR] Fix parsing & emitting relative jumps (PR #102936)
Ben Shi via llvm-commits
- [llvm] [AVR] Reformat MC tests (PR #107068)
Ben Shi via llvm-commits
- [llvm] [AVR] Reformat MC tests (PR #107068)
Ben Shi via llvm-commits
- [llvm] [mlir] eliminating g++ warnings (PR #105520)
Benjamin Maxwell via llvm-commits
- [llvm] [WIP] [IR] Add `llvm.sincos` intrinsic (PR #107639)
Benjamin Maxwell via llvm-commits
- [llvm] [WIP] [IR] Add `llvm.sincos` intrinsic (PR #107639)
Benjamin Maxwell via llvm-commits
- [clang] [llvm] [ARM] Save floating point registers and status registers with save_fp function attribute (PR #89654)
Benson Chu via llvm-commits
- [clang] [llvm] [ARM] Save floating point registers and status registers with save_fp function attribute (PR #89654)
Benson Chu via llvm-commits
- [clang] [llvm] [ARM] Save floating point registers and status registers with save_fp function attribute (PR #89654)
Benson Chu via llvm-commits
- [clang] [llvm] [ARM] Save floating point registers and status registers with save_fp function attribute (PR #89654)
Benson Chu via llvm-commits
- [clang] [llvm] [ARM] Save floating point registers and status registers with save_fp function attribute (PR #89654)
Benson Chu via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
Björn Schäpers via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
Björn Schäpers via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
Björn Schäpers via llvm-commits
- Urgent Response Needed
Bookings via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming under DragonFly BSD and Solaris/illumos (PR #106944)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming under DragonFly BSD and Solaris/illumos (PR #106944)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Adjust maximum thread name length to the right value for OpenBSD (PR #106956)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Adjust maximum thread name length to the right value for OpenBSD (PR #106956)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming under DragonFly BSD and Solaris/illumos (PR #106944)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming under DragonFly BSD and Solaris/illumos (PR #106944)
Brad Smith via llvm-commits
- [compiler-rt] [compiler-rt] Set the default C++ library to libc++ on OpenBSD (PR #107694)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming for Haiku (PR #107646)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming for Haiku (PR #107646)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming for Haiku (PR #107646)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Determine the max thread length on Haiku (PR #107801)
Brad Smith via llvm-commits
- [llvm] [llvm][Support] Determine the max thread length on Haiku (PR #107801)
Brad Smith via llvm-commits
- [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Rename `vcix_state` register to `sf_vcix_state` (PR #106995)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Rename `vcix_state` register to `sf_vcix_state`. NFC (PR #106995)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Rename `vcix_state` register to `sf_vcix_state`. NFC (PR #106995)
Brandon Wu via llvm-commits
- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
Brandon Wu via llvm-commits
- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
Brandon Wu via llvm-commits
- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
Brandon Wu via llvm-commits
- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
Brandon Wu via llvm-commits
- [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)
Brandon Wu via llvm-commits
- [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Rename `vcix_state` register to `sf_vcix_state`. NFC (PR #106995)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Rename sf_vcix_state to sf.vcix_state (PR #107115)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Rename sf_vcix_state to sf.vcix_state. NFC (PR #107115)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Rename sf_vcix_state to sf.vcix_state. NFC (PR #107115)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Rename sf_vcix_state to sf.vcix_state. NFC (PR #107115)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Remove pre-assignment of mask vectors during call lowering. (PR #107192)
Brandon Wu via llvm-commits
- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
Brandon Wu via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Brandon Wu via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Separate the calling convention handlers into their own file. (PR #107484)
Brandon Wu via llvm-commits
- [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)
Brandon Wu via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
Brian Cain via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
Brian Cain via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
Brian Cain via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
Brian Cain via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
Brian Cain via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
Brian Cain via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
Brian Cain via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
Brian Cain via llvm-commits
- [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)
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Chris Apple via llvm-commits
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Chris Apple via llvm-commits
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Chris Apple via llvm-commits
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Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Add basic test for c compilation (PR #107717)
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Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Add basic test for c compilation (PR #107717)
Chris Apple via llvm-commits
- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
Chris B via llvm-commits
- [llvm] [CodeGen] Add generic INIT_UNDEF pseudo (PR #106744)
Chris B via llvm-commits
- [llvm] [DXIL] Add sign intrinsic part 2 (PR #101988)
Chris B via llvm-commits
- [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)
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- [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)
Chris Lattner via llvm-commits
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Chris Lattner via llvm-commits
- [llvm] [mlir] [mlir][nvvm] Expand sitofp/uitofp to faster ops (PR #107001)
Christian Sigg via llvm-commits
- [llvm] [mlir] [nvvm] Include `llvm-optimize-for-nvvm-target` pass in `gpu-lower-to-nvvm-pipeline` (PR #107102)
Christian Sigg via llvm-commits
- [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)
Christopher Di Bella via llvm-commits
- [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)
Christopher Di Bella via llvm-commits
- [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)
Christopher Di Bella via llvm-commits
- [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)
Christopher Di Bella via llvm-commits
- [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)
Christopher Di Bella via llvm-commits
- [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)
Christopher Di Bella via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Use variable instead of recomputing. (PR #106647)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Use variable instead of recomputing. (PR #106647)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
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Christopher Ferris via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (PR #106967)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (PR #106967)
Christudasan Devadasan via llvm-commits
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Christudasan Devadasan via llvm-commits
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Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (PR #106967)
Christudasan Devadasan via llvm-commits
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Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (PR #106967)
Christudasan Devadasan via llvm-commits
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- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] V_SET_INACTIVE optimizations (PR #98864)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][MachineCSE] Remove unused AA results(NFC) (PR #106604)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][MachineCSE] Remove unused AA results(NFC) (PR #106604)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][MachineCSE] Remove unused AA results(NFC) (PR #106604)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][MachineCSE] Remove unused AA results(NFC) (PR #106604)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][MachineCSE] Remove unused AA results(NFC) (PR #106604)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][MachineCSE] Remove unused AA results(NFC) (PR #106604)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][NewPM] Port MachineCSE pass to new pass manager. (PR #106605)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][NewPM] Port MachineCSE pass to new pass manager. (PR #106605)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][NewPM] Port MachineCSE pass to new pass manager. (PR #106605)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Split vgpr regalloc pipeline (PR #93526)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][NewPM] Use verify-each option in npm tests (NFC). (PR #107373)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][NewPM] Use verify-each option in npm tests (NFC). (PR #107373)
Christudasan Devadasan via llvm-commits
- [llvm] [CodeGen][NewPM] Use verify-each option in npm tests (NFC). (PR #107373)
Christudasan Devadasan via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Chuanqi Xu via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Chuanqi Xu via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Chuanqi Xu via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Chuanqi Xu via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Chuanqi Xu via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Chuanqi Xu via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] Move the SuspendCrossingInfo analysis helper into its own header/source (PR #106306)
Chuanqi Xu via llvm-commits
- [clang] [llvm] [Clang] C++20 Coroutines: Introduce Frontend Attribute [[clang::coro_await_elidable]] (PR #99282)
Chuanqi Xu via llvm-commits
- [lld] [lld][llvm-lit] Enabled lit internal shell for lld test suite (PR #106651)
Connie Zhu via llvm-commits
- [lld] [lld][llvm-lit] Enabled lit internal shell for lld test suite (PR #106651)
Connie Zhu via llvm-commits
- [llvm] [RISCV] Remove zfbfmin.ll. NFC (PR #106937)
Craig Topper via llvm-commits
- [llvm] [CodeGen] Update a few places that were passing Register to raw_ostream::operator<< (PR #106877)
Craig Topper via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (PR #106948)
Craig Topper via llvm-commits
- [llvm] [RISCV] Added new register class GPRNoGPRS defined as substraction of GPRC sequences from GPR (PR #106974)
Craig Topper via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Craig Topper via llvm-commits
- [llvm] [RISCV] Remove RISCVISD::FP_EXTEND_BF16. (PR #106939)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (PR #106948)
Craig Topper via llvm-commits
- [llvm] [RISCV] Rename `vcix_state` register to `sf_vcix_state`. NFC (PR #106995)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Craig Topper via llvm-commits
- [llvm] [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (PR #106783)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Craig Topper via llvm-commits
- [llvm] [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (PR #106783)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (PR #107026)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (PR #107026)
Craig Topper via llvm-commits
- [llvm] [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (PR #106783)
Craig Topper via llvm-commits
- [llvm] [RISCV] Correct the scheduler class for FCVT_S_BF16. (PR #107028)
Craig Topper via llvm-commits
- [llvm] [RISCV] Correct the scheduler class for FCVT_S_BF16. (PR #107028)
Craig Topper via llvm-commits
- [llvm] dc19b59 - [RISCV] Rename test cases in bfloat-arith.ll and half-arith.ll. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom legalize f16/bf16 FCOPYSIGN with Zfhmin/Zbfmin. (PR #107039)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom legalize f16/bf16 FCOPYSIGN with Zfhmin/Zbfmin. (PR #107039)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (PR #106948)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (PR #106948)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (PR #107026)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
Craig Topper via llvm-commits
- [llvm] [RISCV] Bitcast fixed length bf16/f16 build_vector to i16 with Zvfbfmin/Zvfhmin+Zfbfmin/Zfhmin. (PR #106637)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use CCValAssign::getCustomReg for converting f16/f32<->GPR. (PR #105700)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't promote f16/bf16 SELECT with Zfhmin/Zfbfmin. (PR #107138)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't promote f16/bf16 SELECT with Zfhmin/Zfbfmin. (PR #107138)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (PR #107026)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't promote f16/bf16 SELECT with Zfhmin/Zfbfmin. (PR #107138)
Craig Topper via llvm-commits
- [llvm] [RISCV] Bitcast fixed length bf16/f16 build_vector to i16 with Zvfbfmin/Zvfhmin+Zfbfmin/Zfhmin. (PR #106637)
Craig Topper via llvm-commits
- [llvm] db8ca88 - [TableGen] Print all arguments to GET_VT_ATTR in the comment in GenVT.inc. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't promote f16/bf16 SELECT with Zfhmin/Zfbfmin. (PR #107138)
Craig Topper via llvm-commits
- [llvm] [APInt] improve initialization performance (PR #106945)
Craig Topper via llvm-commits
- [llvm] [RISCV] Bitcast fixed length bf16/f16 build_vector to i16 with Zvfbfmin/Zvfhmin+Zfbfmin/Zfhmin. (PR #106637)
Craig Topper via llvm-commits
- [llvm] a5ce664 - [RISCV] Remove RISCVISD::FP_ROUND_BF16.
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix missing `i64` to `double` tests in the cast.ll. (NFC) (PR #106972)
Craig Topper via llvm-commits
- [llvm] [LegalizeDAG][RISCV] Don't promote f16 vector ISD::FNEG/FABS/FCOPYSIGN to f32 when we don't have Zvfh. (PR #106652)
Craig Topper via llvm-commits
- [llvm] [LegalizeDAG][RISCV] Don't promote f16 vector ISD::FNEG/FABS/FCOPYSIGN to f32 when we don't have Zvfh. (PR #106652)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use CCValAssign::getCustomReg for converting f16/f32<->GPR. (PR #105700)
Craig Topper via llvm-commits
- [llvm] 7deda4e - [RISCV] Use MCRegister for variables returned from AllocateReg. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Remove pre-assignment of mask vectors during call lowering. (PR #107192)
Craig Topper via llvm-commits
- [llvm] [RISCV] Remove pre-assignment of mask vectors during call lowering. NFC (PR #107192)
Craig Topper via llvm-commits
- [llvm] [RISCV] Select zero splats of EEW=64 on RV32 (PR #107205)
Craig Topper via llvm-commits
- [llvm] [RISCV] Remove pre-assignment of mask vectors during call lowering. NFC (PR #107192)
Craig Topper via llvm-commits
- [llvm] [RISCV] Select zero splats of EEW=64 on RV32 (PR #107205)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
Craig Topper via llvm-commits
- [llvm] [RISCV] Select zero splats of EEW=64 on RV32 (PR #107205)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support fixed vector VP_LOAD/STORE for bf16 and f16 without Zvfh. (PR #107297)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support fixed vector VP_LOAD/STORE for bf16 and f16 without Zvfh. (PR #107297)
Craig Topper via llvm-commits
- [llvm] d21e731 - [RISCV] Fix typos in comment. NFC
Craig Topper via llvm-commits
- [llvm] [Target] Use templated MachineFunction::getSubtarget in *CallingConv.td. NFC (PR #107311)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
Craig Topper via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
Craig Topper via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support fixed vector VP_LOAD/STORE for bf16 and f16 without Zvfh. (PR #107297)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
Craig Topper via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Craig Topper via llvm-commits
- [llvm] [Target] Use templated MachineFunction::getSubtarget in *CallingConv.td. NFC (PR #107311)
Craig Topper via llvm-commits
- [llvm] 0c1500e - [RISCV] Fix another RV32 Zdinx load/store addressing corner case.
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (PR #107361)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (PR #107361)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (PR #107361)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (PR #107361)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] [RISCV] Separate the calling convention handlers into their own file. (PR #107484)
Craig Topper via llvm-commits
- [llvm] [RISCV] Separate the calling convention handlers into their own file. (PR #107484)
Craig Topper via llvm-commits
- [llvm] [RISCV] Separate the calling convention handlers into their own file. (PR #107484)
Craig Topper via llvm-commits
- [llvm] [RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (PR #106108)
Craig Topper via llvm-commits
- [llvm] [RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (PR #106108)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] [RISCV] Separate the calling convention handlers into their own file. NFC (PR #107484)
Craig Topper via llvm-commits
- [llvm] [RISCV] Separate the calling convention handlers into their own file. NFC (PR #107484)
Craig Topper via llvm-commits
- [llvm] [RISCV] Reduce the interface to RISCVCCAssignFn. NFC (PR #107503)
Craig Topper via llvm-commits
- [llvm] [RISCV] Reduce the interface to RISCVCCAssignFn. NFC (PR #107503)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)
Craig Topper via llvm-commits
- [llvm] [RISCV] Reduce the interface to RISCVCCAssignFn. NFC (PR #107503)
Craig Topper via llvm-commits
- [llvm] [RISCV] Separate the calling convention handlers into their own file. NFC (PR #107484)
Craig Topper via llvm-commits
- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
Craig Topper via llvm-commits
- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] [RISCV] Reduce the interface to RISCVCCAssignFn. NFC (PR #107503)
Craig Topper via llvm-commits
- [llvm] [RISCV] Reduce the interface to RISCVCCAssignFn. NFC (PR #107503)
Craig Topper via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] fd13cc0 - [RISCV] Use Subtarget variable instaed of TLI.getSubtarget(). NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Support fastcc passing scalable vectors indirectly with no free GPRs. (PR #107623)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support fastcc passing scalable vectors indirectly with no free GPRs. (PR #107623)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Craig Topper via llvm-commits
- [llvm] [LegalizeIntegerTypes] Simplify ExpandIntRes_FP_TO_XINT when operand needs to be SoftPromoted. (PR #107634)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support fastcc passing scalable vectors indirectly with no free GPRs. (PR #107623)
Craig Topper via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] [GISel] Use Function::getFunctionType() instead of getType() in some remarks. (PR #107651)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Craig Topper via llvm-commits
- [llvm] 9e1e36d - [RISCV] Add Zfhmin fastcc test. NFC
Craig Topper via llvm-commits
- [llvm] 748ae69 - [RISCV] Add fastcc support for bf16 with Zfbfmin.
Craig Topper via llvm-commits
- [llvm] [RISCV] Support fastcc passing scalable vectors indirectly with no free GPRs. (PR #107623)
Craig Topper via llvm-commits
- [llvm] f93114d - [RISCV] Use int64_t for offsets returned from CCState::AllocateStack. NFC
Craig Topper via llvm-commits
- [llvm] [GISel] Use Function::getFunctionType() instead of getType() in some remarks. (PR #107651)
Craig Topper via llvm-commits
- [llvm] 090b07f - [RISCV] Simplify some code in unpackFromMemLoc. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. (PR #107671)
Craig Topper via llvm-commits
- [llvm] 1b8e26f - [RISCV] Use RISCVSubtarget to get XLen in CC_RISCV. NFC
Craig Topper via llvm-commits
- [llvm] 0e775b8 - [RISCV] Move fixed vector LocVT change in CC_RISCV. NFC
Craig Topper via llvm-commits
- [llvm] [NFC][TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (PR #107697)
Craig Topper via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Craig Topper via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Craig Topper via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Craig Topper via llvm-commits
- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
Craig Topper via llvm-commits
- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
Craig Topper via llvm-commits
- [llvm] c30c065 - [RISCV] Fix crashes with Zfhmin+Zfa.
Craig Topper via llvm-commits
- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
Craig Topper via llvm-commits
- [llvm] [AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (PR #106968)
Csanád Hajdú via llvm-commits
- [llvm] [Patchpoint] Add immarg attributes to patchpoint arguments (PR #97276)
Csanád Hajdú via llvm-commits
- [llvm] [Patchpoint] Add immarg attributes to patchpoint arguments (PR #97276)
Csanád Hajdú via llvm-commits
- [llvm] [AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (PR #106968)
Csanád Hajdú via llvm-commits
- [llvm] [AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (PR #106968)
Csanád Hajdú via llvm-commits
- [llvm] [Statepoint] Treat result of atomicrmw xchg as a base pointer (PR #97280)
Csanád Hajdú via llvm-commits
- [llvm] [LICM] Prevent LICM of ptrtoint and inttoptr when using non-integral pointers (PR #97272)
Csanád Hajdú via llvm-commits
- [llvm] [LICM] Prevent LICM of ptrtoint and inttoptr when using non-integral pointers (PR #97272)
Csanád Hajdú via llvm-commits
- [llvm] [AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (PR #106968)
Csanád Hajdú via llvm-commits
- [llvm] [AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (PR #106968)
Csanád Hajdú via llvm-commits
- [llvm] [NFC] Add llvm_unreachable to getRCPrefix (PR #106822)
Damyan Pepper via llvm-commits
- [llvm] [NFC] Add llvm_unreachable to getRCPrefix (PR #106822)
Damyan Pepper via llvm-commits
- [llvm] [DirectX] Fix crash in DXILOpBuilder for vector types (PR #107334)
Damyan Pepper via llvm-commits
- [llvm] [DirectX] Clean up trailing whitespace. NFC (PR #107335)
Damyan Pepper via llvm-commits
- [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)
Damyan Pepper via llvm-commits
- [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)
Damyan Pepper via llvm-commits
- [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)
Damyan Pepper via llvm-commits
- [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)
Damyan Pepper via llvm-commits
- [llvm] [gn build] Add missing llvm-strings dependency to check-lld (PR #106896)
Daniel Bertalan via llvm-commits
- [lld] [lld-macho] Always store symbol name length eagerly (NFC) (PR #106906)
Daniel Bertalan via llvm-commits
- [llvm] [gn build] Allow specifying macOS deployment target (PR #107492)
Daniel Bertalan via llvm-commits
- [llvm] [gn build] Allow specifying macOS deployment target (PR #107492)
Daniel Bertalan via llvm-commits
- [llvm] [gn build] Allow specifying macOS deployment target (PR #107492)
Daniel Bertalan via llvm-commits
- [llvm] [gn build] Bump macOS target to 12 and make it configurable (PR #107492)
Daniel Bertalan via llvm-commits
- [llvm] [gn build] Bump macOS target to 12 and make it configurable (PR #107492)
Daniel Bertalan via llvm-commits
- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
Daniel Bertalan via llvm-commits
- [llvm] [gn build] Bump macOS target to 12 and make it configurable (PR #107492)
Daniel Bertalan via llvm-commits
- [lld] [lld-macho] Fix `Defined` size increase with `-mms-bitfields` (PR #107545)
Daniel Bertalan via llvm-commits
- [lld] [lld-macho] Fix `Defined` size increase with `-mms-bitfields` (PR #107545)
Daniel Bertalan via llvm-commits
- [clang] [clang-tools-extra] [lld] [lldb] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used. (PR #106810)
Daniil Fukalov via llvm-commits
- [clang] [clang-tools-extra] [lld] [lldb] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used. (PR #106810)
Daniil Fukalov via llvm-commits
- [clang] [clang-tools-extra] [lld] [lldb] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used. (PR #106810)
Daniil Fukalov via llvm-commits
- [clang] [clang-tools-extra] [lld] [lldb] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used. (PR #106810)
Daniil Fukalov via llvm-commits
- [clang] [clang-tools-extra] [lld] [lldb] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used. (PR #106810)
Daniil Fukalov via llvm-commits
- [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)
Daniil Fukalov via llvm-commits
- [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)
Daniil Fukalov via llvm-commits
- [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)
Daniil Fukalov via llvm-commits
- [llvm] [LLVM][DWARF] Make some effort to avoid duplicates in .debug_ranges. (PR #106614)
David Blaikie via llvm-commits
- [llvm] Reapply "[llvm/DWARF] Recursively resolve DW_AT_signature references"… (PR #99495)
David Blaikie via llvm-commits
- [llvm] [LLVM][DWARF] Make some effort to avoid duplicates in .debug_ranges. (PR #106614)
David Blaikie via llvm-commits
- [llvm] [LLVM][DWARF] Make some effort to avoid duplicates in .debug_ranges. (PR #106614)
David Blaikie via llvm-commits
- [llvm] [DWARF] Emit a minimal line-table for totally empty functions (PR #107267)
David Blaikie via llvm-commits
- [llvm] [DWARF] Don't search scope chain to find DISubprogram for prologues (PR #107261)
David Blaikie via llvm-commits
- [llvm] [LLVM][DWARF] Make some effort to avoid duplicates in .debug_ranges. (PR #106614)
David Blaikie via llvm-commits
- [llvm] [LLVM][DWARF] Make some effort to avoid duplicates in .debug_ranges. (PR #106614)
David Blaikie via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming under DragonFly BSD and Solaris/illumos (PR #106944)
David CARLIER via llvm-commits
- [llvm] [llvm][Support] Adjust maximum thread name length to the right value for OpenBSD (PR #106956)
David CARLIER via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming under DragonFly BSD and Solaris/illumos (PR #106944)
David CARLIER via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming for Haiku (PR #107646)
David CARLIER via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming for Haiku (PR #107646)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt] prctl interception update, SECCOMP_MODE_FILTER support. (PR #107722)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt] intercept macOs's freadlink call. (PR #83679)
David CARLIER via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming for Haiku (PR #107646)
David CARLIER via llvm-commits
- [llvm] [llvm][Support] Determine the max thread length on Haiku (PR #107801)
David CARLIER via llvm-commits
- [llvm] [CodeGen] Add generic INIT_UNDEF pseudo (PR #106744)
David Green via llvm-commits
- [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)
David Green via llvm-commits
- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
David Green via llvm-commits
- [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)
David Green via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
David Green via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
David Green via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
David Green via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
David Green via llvm-commits
- [llvm] [AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (PR #106968)
David Green via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
David Green via llvm-commits
- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
David Green via llvm-commits
- [llvm] 12d678a - [AArch64] Add codegen tests for zext(deinterleave). NFC
David Green via llvm-commits
- [llvm] [AArch64] Combine zext of deinterleaving shuffle. (PR #107201)
David Green via llvm-commits
- [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)
David Green via llvm-commits
- [llvm] [ARM] Do not assume alignment in vld1xN and vst1xN intrinsics (PR #106984)
David Green via llvm-commits
- [llvm] [CodeGen] Add generic INIT_UNDEF pseudo (PR #106744)
David Green via llvm-commits
- [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)
David Green via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
David Green via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
David Green via llvm-commits
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- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Ellis Hoag via llvm-commits
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Elvis Wang via llvm-commits
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Elvis Wang via llvm-commits
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Elvis Wang via llvm-commits
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Elvis Wang via llvm-commits
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Elvis Wang via llvm-commits
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Elvis Wang via llvm-commits
- [llvm] [VPlan] Implement VPReductionRecipe::computeCost(). NFC (PR #107790)
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Fabian Ritter via llvm-commits
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Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Rename CATCH/CATCH_ALL to *_P3 (PR #107187)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Rename CATCH/CATCH_ALL to *_P3 (PR #107187)
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
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- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
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- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
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- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
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- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
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- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
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- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
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- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Implement '__builtin_hlsl_is_intangible' type trait (PR #104544)
Helena Kotas via llvm-commits
- [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)
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Hua Tian via llvm-commits
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Hua Tian via llvm-commits
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Hua Tian via llvm-commits
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Igor Kirillov via llvm-commits
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Igor Kirillov via llvm-commits
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Igor Kirillov via llvm-commits
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Igor Kirillov via llvm-commits
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Igor Kirillov via llvm-commits
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Igor Kirillov via llvm-commits
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Igor Kirillov via llvm-commits
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Igor Kirillov via llvm-commits
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- [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)
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- [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)
Ilya Biryukov via llvm-commits
- [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)
Ilya Biryukov via llvm-commits
- [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)
Ilya Biryukov via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
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- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Ivan Kosarev via llvm-commits
- [llvm] [TBAA] Fix the case where a subobject gets accessed at a non-zero offset. (PR #101485)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Ivan Kosarev via llvm-commits
- [llvm] [TBAA] Fix the case where a subobject gets accessed at a non-zero offset. (PR #101485)
Ivan Kosarev via llvm-commits
- [llvm] [TBAA] Fix the case where a subobject gets accessed at a non-zero offset. (PR #101485)
Ivan Kosarev via llvm-commits
- [llvm] [NFC] Fix #106873 - update assignment tracking docs (PR #106959)
J. Ryan Stinnett via llvm-commits
- [llvm] [NFC] Fix #106873 - update assignment tracking docs (PR #106959)
J. Ryan Stinnett via llvm-commits
- [llvm] [NFC] Fix #106873 - update assignment tracking docs (PR #106959)
J. Ryan Stinnett via llvm-commits
- [llvm] [DebugInfo][AIX] XFAIL debug-ranges-duplication.ll (PR #107525)
J. Ryan Stinnett via llvm-commits
- [llvm] [DebugInfo][AIX] XFAIL debug-ranges-duplication.ll (PR #107525)
J. Ryan Stinnett via llvm-commits
- [llvm] [DebugInfo][AIX] XFAIL debug-ranges-duplication.ll (PR #107525)
J. Ryan Stinnett via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF][NFC] Store impSym as DefinedImportData in ImportFile. (PR #107162)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF][NFC] Store impSym as DefinedImportData in ImportFile. (PR #107162)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF][NFC] Store impSym as DefinedImportData in ImportFile. (PR #107162)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Jacek Caban via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
Jacek Caban via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Jacek Caban via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
Jacek Caban via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
Jacek Caban via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF][NFC] Use is64Bit in Baserel::getDefaultType. (PR #107378)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF][NFC] Use is64Bit in Baserel::getDefaultType. (PR #107378)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
Jacek Caban via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [lldb] [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Jacob Lalonde via llvm-commits
- [llvm] [LLVM][DWARF] Make some effort to avoid duplicates in .debug_ranges. (PR #106614)
Jake Egan via llvm-commits
- [llvm] [DebugInfo][AIX] XFAIL debug-ranges-duplication.ll (PR #107525)
Jake Egan via llvm-commits
- [llvm] [LLVM]Fix symbol visibility macros not being define for AIX (PR #107705)
Jake Egan via llvm-commits
- [llvm] [LLVM]Fix symbol visibility macros not being define for AIX (PR #107705)
Jake Egan via llvm-commits
- [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)
Jakub Jelínek via llvm-commits
- [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)
Jakub Jelínek via llvm-commits
- [llvm] [ADT] Skip destroying trivially destructible values in DenseMap (PR #106934)
Jakub Kuderski via llvm-commits
- [clang] [flang] [llvm] [mlir] [ADT] Deprecate DenseMap::getOrInsertDefault (PR #107040)
Jakub Kuderski via llvm-commits
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Jakub Kuderski via llvm-commits
- [llvm] [mlir] eliminating g++ warnings (PR #105520)
Jakub Kuderski via llvm-commits
- [llvm] [mlir] eliminating g++ warnings (PR #105520)
Jakub Kuderski via llvm-commits
- [llvm] [mlir] eliminating g++ warnings (PR #105520)
Jakub Kuderski via llvm-commits
- [llvm] [DominanceFrontier] Remove unused functions (PR #106913)
Jakub Kuderski via llvm-commits
- [llvm] [APFloat] Fix literals with long significands. (PR #102051)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Remove the const variant of LookupBucketFor in DenseMap (PR #107608)
Jakub Kuderski via llvm-commits
- [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)
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- [lld] [lld][llvm-lit] Enabled lit internal shell for lld test suite (PR #106651)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
James Henderson via llvm-commits
- [lld] [lld][llvm-lit] Enabled lit internal shell for lld test suite (PR #106651)
James Henderson via llvm-commits
- [clang] [llvm] Remove support for 3DNow!, both intrinsics and builtins. (PR #96246)
James Y Knight via llvm-commits
- [llvm] Avoid exposing password and token from git repositories (PR #105220)
James Y Knight via llvm-commits
- [llvm] Avoid exposing password and token from git repositories (PR #105220)
James Y Knight via llvm-commits
- [llvm] Revert " [InstCombine] Replace all dominated uses of condition with constants" (PR #106921)
Jan Patrick Lehr via llvm-commits
- [llvm] [Offload] Change x86_64-pc-linux to x86_64-unknown-linux (PR #107023)
Jan Patrick Lehr via llvm-commits
- [llvm] [Offload] Change x86_64-pc-linux to x86_64-unknown-linux (PR #107023)
Jan Patrick Lehr via llvm-commits
- [llvm] [Offload] Change x86_64-pc-linux to x86_64-unknown-linux (PR #107023)
Jan Patrick Lehr via llvm-commits
- [clang] [llvm] [llvm][support] Implement tracing virtual file system (PR #88326)
Jan Svoboda via llvm-commits
- [clang] [llvm] [llvm][support] Implement tracing virtual file system (PR #88326)
Jan Svoboda via llvm-commits
- [clang] [llvm] Fix build errors with a `LLVM_ENABLE_MODULES=ON` build (PR #107654)
Jan Svoboda via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Jan Voung via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Jan Voung via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Jan Voung via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Jan Voung via llvm-commits
- [clang] [llvm] [AMDGPU] Convert AMDGPUResourceUsageAnalysis pass from Module to MF pass (PR #102913)
Janek van Oirschot via llvm-commits
- [llvm] [M68k] implement large code model (PR #106381)
Janis Heims via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Janis Heims via llvm-commits
- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
Janis Heims via llvm-commits
- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
Janis Heims via llvm-commits
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Janis Heims via llvm-commits
- [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)
Jason Molenda via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to i32 in GISel (PR #106557)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to i32 in GISel (PR #106557)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to i32 in GISel (PR #106557)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to i32 in GISel (PR #106557)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to i32 in GISel (PR #106557)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)
Jay Foad via llvm-commits
- [llvm] [DAG] Prefer 0.0 over -0.0 as neutral value for FADD w/NoSignedZero (PR #106616)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [CodeGen] Distinguish zero-sized call frames from no call frame in MachineBB (PR #106964)
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- [llvm] [AMDGPU][Docs] Update product names for some targets (PR #106973)
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] V_SET_INACTIVE optimizations (PR #98864)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] V_SET_INACTIVE optimizations (PR #98864)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] V_SET_INACTIVE optimizations (PR #98864)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] V_SET_INACTIVE optimizations (PR #98864)
Jay Foad via llvm-commits
- [llvm] [CodeGen] Distinguish zero-sized call frames from no call frame in MachineBB (PR #106964)
Jay Foad via llvm-commits
- [llvm] f77f604 - [CodeGen] Remove checks that implicit operands are implicit
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- [llvm] [AMDGPU] Improve codegen for GFX10+ DPP reductions and scans (PR #107108)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Improve codegen for GFX10+ DPP reductions and scans (PR #107108)
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- [llvm] [AMDGPU] Improve codegen for GFX10+ DPP reductions and scans (PR #107108)
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- [llvm] 5a6926c - [AMDGPU] Fix test update after #107108
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- [llvm] AMDGPU: Update live intervals in convertToThreeAddress (PR #104610)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Overload image atomic swap to allow float as well. (PR #107283)
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- [llvm] [AMDGPU] Add image_atomic_fmin/fmax as aliases for GFX12 (PR #107242)
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Jay Foad via llvm-commits
- [llvm] [CodeGen] Distinguish zero-sized call frames from no call frame in MachineBB (PR #106964)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Jay Foad via llvm-commits
- [llvm] 4ce8808 - [AMDGPU] Common up default value of -amdgpu-nsa-threshold. NFC.
Jay Foad via llvm-commits
- [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #107669)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary untieRegOperand (PR #107695)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary untieRegOperand (PR #107695)
Jay Foad via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Find types hidden in DbgRecords (PR #106547)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Find types hidden in DbgRecords (PR #106547)
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- [llvm] [NFC] Fix #106873 - update assignment tracking docs (PR #106959)
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- [llvm] [DWARF] Don't search scope chain to find DISubprogram for prologues (PR #107261)
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- [llvm] [DWARF] Identify prologue_end by instruction rather than DILocation (PR #107264)
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- [llvm] [Instrumentation] Mark instrumented calls as implicit (PR #106447)
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- [llvm] [DWARF] Emit a minimal line-table for totally empty functions (PR #107267)
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- [llvm] [DWARF] Emit a minimal line-table for totally empty functions (PR #107267)
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- [llvm] [DWARF] Emit a minimal line-table for totally empty functions (PR #107267)
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- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
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- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
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- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
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- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Jessica Clarke via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Jessica Clarke via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
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- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Jessica Clarke via llvm-commits
- [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)
Jessica Clarke via llvm-commits
- [llvm] 20fa37b - [Vectorize] Fix -Wunused-variable in SLPVectorizer.cpp (NFC)
Jie Fu via llvm-commits
- [llvm] a7f152f - [Bitcode] Fix -Wunused-but-set-variable in BitcodeReader.cpp (NFC)
Jie Fu via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Jim Lin via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Jim Lin via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Jim Lin via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Jim Lin via llvm-commits
- [llvm] [RISCV] Support the large code model. (PR #70308)
Jim Lin via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)
Joe Nash via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Joel E. Denny via llvm-commits
- [clang] [llvm] [Clang] Add env var for nvptx-arch/amdgpu-arch timeout (PR #102521)
Joel E. Denny via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Joel E. Denny via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Joel E. Denny via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Joel E. Denny via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Joel E. Denny via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Joel E. Denny via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Joel E. Denny via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][FIX] Ensure to always translate call site arguments (PR #107323)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][FIX] Ensure to always translate call site arguments (PR #107323)
Johannes Doerfert via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Johannes Doerfert via llvm-commits
- [llvm] [Offload][NFC] Reorganize `utils::` and make Device/Host/Shared clearer (PR #100280)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor] fix aapi precommits (PR #107457)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][NFC] Pre-commits for #107439 (PR #107457)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][NFC] Pre-commits for #107439 (PR #107457)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Johannes Doerfert via llvm-commits
- [llvm] [Offload][NFC] Reorganize `utils::` and make Device/Host/Shared clearer (PR #100280)
Johannes Doerfert via llvm-commits
- [llvm] [Offload][NFC] Reorganize `utils::` and make Device/Host/Shared clearer (PR #100280)
Johannes Doerfert via llvm-commits
- [llvm] [Offload][NFC] Reorganize `utils::` and make Device/Host/Shared clearer (PR #100280)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor][FIX] Ensure to always translate call site arguments (PR #107323)
Johannes Doerfert via llvm-commits
- [llvm] [Attributor] Keep track of reached returns in AAPointerInfo (PR #107479)
Johannes Doerfert via llvm-commits
- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
Jon Roelofs via llvm-commits
- [llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)
Jon Roelofs via llvm-commits
- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
Jon Roelofs via llvm-commits
- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
Jon Roelofs via llvm-commits
- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
Jon Roelofs via llvm-commits
- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
Jon Roelofs via llvm-commits
- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
Jon Roelofs via llvm-commits
- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
Jon Roelofs via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Jon Roelofs via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Jon Roelofs via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Jon Roelofs via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Jon Roelofs via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Jonas Devlieghere via llvm-commits
- [llvm] [X86][MC] Cont. update for AVX10.2-BF16 (PR #107529)
Jordan Rupprecht via llvm-commits
- [llvm] [SandboxIR] Add tracking for ShuffleVectorInst::commute. (PR #106644)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxIR] Add tracking for ShuffleVectorInst::commute. (PR #106644)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxIR] Add tracking for ShuffleVectorInst::commute. (PR #106644)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxIR] Add tracking for ShuffleVectorInst::commute. (PR #106644)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxIR] Add bazel support (PR #107486)
Jorge Gorbe Moya via llvm-commits
- [llvm] [Offload] Change x86_64-pc-linux to x86_64-unknown-linux (PR #107023)
Joseph Huber via llvm-commits
- [llvm] [Offload] Change x86_64-pc-linux to x86_64-unknown-linux (PR #107023)
Joseph Huber via llvm-commits
- [clang] [llvm] [Offload] Move HIP and CUDA to new driver by default (PR #84420)
Joseph Huber via llvm-commits
- [llvm] [Offload][NFC] Reorganize `utils::` and make Device/Host/Shared clearer (PR #100280)
Joseph Huber via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
Joshua Baehring via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
Joshua Cao via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
Joshua Cao via llvm-commits
- [llvm] [polly] [BBUtils][nfc] Delete SplitBlockPredecessors with DT (PR #97196)
Joshua Cao via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
Joshua Cao via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
Joshua Cao via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
Joshua Cao via llvm-commits
- [llvm] [Transforms] Avoid repeated hash looksup (NFC) (PR #107727)
Joshua Cao via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
Joshua Cao via llvm-commits
- [llvm] [AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107091)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU][LDS] Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107092)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU] Create an AMDGPUIfConverter pass (PR #106415)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107091)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107091)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU][LDS] Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107092)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107091)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU][LDS] Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107092)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU] Create an AMDGPUIfConverter pass (PR #106415)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU] Create an AMDGPUIfConverter pass (PR #106415)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Disallow op_sel in v_dot4 and v_dot8 with 4- or 8-bit packed data (PR #100485)
Jun Wang via llvm-commits
- [clang] [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)
Jun Wang via llvm-commits
- [clang] [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)
Jun Wang via llvm-commits
- [clang] [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)
Jun Wang via llvm-commits
- [clang] [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)
Jun Wang via llvm-commits
- [clang] [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)
Jun Wang via llvm-commits
- [llvm] [AMDGPU] In instruction selector, allow copy from physical reg to s1 (PR #96157)
Jun Wang via llvm-commits
- [llvm] [NFC] Add llvm_unreachable to getRCPrefix (PR #106822)
Justin Bogner via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
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Luke Lau via llvm-commits
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Luke Lau via llvm-commits
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Luke Lau via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)
Luke Lau via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Luke Lau via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Luke Lau via llvm-commits
- [llvm] [GISEL][AArch64] Stop using wip_match_opcode for some opcodes (PR #106702)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (PR #106702)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (PR #106702)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (PR #106702)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (PR #106702)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (PR #106702)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (PR #106702)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LV] Fix emission of debug message in legality check (PR #101924)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LV] Fix emission of debug message in legality check (PR #101924)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LV] Fix emission of debug message in legality check (PR #101924)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LV] Fix emission of debug message in legality check (PR #101924)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LV] Fix emission of debug message in legality check (PR #101924)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LV] Fix emission of debug message in legality check (PR #101924)
Madhur Amilkanthwar via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
Madhur Amilkanthwar via llvm-commits
- [llvm] [AArch64][GlobalISel] Prefer to use Vector Truncate (PR #105692)
Madhur Amilkanthwar via llvm-commits
- [llvm] [AArch64][GlobalISel] Prefer to use Vector Truncate (PR #105692)
Madhur Amilkanthwar via llvm-commits
- [llvm] [AArch64][GlobalISel] Prefer to use Vector Truncate (PR #105692)
Madhur Amilkanthwar via llvm-commits
- [llvm] [BOLT][YAML] Allow unknown keys in the input (PR #100824)
Maksim Panchenko via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Malay Sanghi via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Malay Sanghi via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Malay Sanghi via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Malay Sanghi via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Malay Sanghi via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Malay Sanghi via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Malay Sanghi via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Malay Sanghi via llvm-commits
- [llvm] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)
Marc Auberer via llvm-commits
- [llvm] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)
Marc Auberer via llvm-commits
- [llvm] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)
Marc Auberer via llvm-commits
- [llvm] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)
Marc Auberer via llvm-commits
- [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)
Marc Auberer via llvm-commits
- [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)
Marc Auberer via llvm-commits
- [compiler-rt] [compiler-rt] Replace assignment w/.set directive (PR #107667)
Marco Elver via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Marina Taylor via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Marina Taylor via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Marina Taylor via llvm-commits
- [llvm] [AArch64] Reduce fuse-literals limit on Apple subtargets (PR #106741)
Marina Taylor via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Marina Taylor via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Marina Taylor via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Marina Taylor via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Marina Taylor via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Marina Taylor via llvm-commits
- [compiler-rt] [compiler-rt] Work around incompatible Windows definitions of (S)SIZE_T (PR #106311)
Mariusz Borsa via llvm-commits
- [compiler-rt] [compiler-rt] Work around incompatible Windows definitions of (S)SIZE_T (PR #106311)
Mariusz Borsa via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt][fuzzer] SetThreadName build fix for Mingwin attempt (PR #106902)
Martin Storsjö via llvm-commits
- [compiler-rt] b32dc67 - Revert "[compiler-rt][fuzzer] SetThreadName build fix for Mingwin attempt (#106902)"
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (PR #106904)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] [docs] Mention Windows as one of the supported OSes (PR #106874)
Martin Storsjö via llvm-commits
- [llvm] [VPlan] Implement VPWidenCallRecipe::computeCost (NFCI). (PR #106047)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libcxx] [ci] Add a test configuration with an incomplete sysroot (PR #107089)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libcxx] [ci] Add a test configuration with an incomplete sysroot (PR #107089)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libcxx] [ci] Add a test configuration with an incomplete sysroot (PR #107089)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libcxx] [ci] Add a test configuration with an incomplete sysroot (PR #107089)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF][NFC] Store impSym as DefinedImportData in ImportFile. (PR #107162)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
Martin Storsjö via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
Martin Storsjö via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
Martin Storsjö via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
Martin Storsjö via llvm-commits
- [llvm] [llvm-ml] Adds /quiet flag to llvm-ml (PR #107308)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF][NFC] Use is64Bit in Baserel::getDefaultType. (PR #107378)
Martin Storsjö via llvm-commits
- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
Martin Storsjö via llvm-commits
- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
Martin Storsjö via llvm-commits
- [lld] [lld-macho] Fix `Defined` size increase with `-mms-bitfields` (PR #107545)
Martin Storsjö via llvm-commits
- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
Martin Storsjö via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Martin Storsjö via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Martin Storsjö via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Martin Storsjö via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Martin Storsjö via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
Martin Storsjö via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
Martin Storsjö via llvm-commits
- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
Martin Storsjö via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Matt Arsenault via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Improve codegen for GFX10+ DPP reductions and scans (PR #107108)
Matt Arsenault via llvm-commits
- [llvm] [WIP] AMDGPU: Handle v_add* in eliminateFrameIndex (PR #102346)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Print memory stats in detailed record emitter (PR #106990)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Print memory stats in detailed record emitter (PR #106990)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix SDWA commuting (PR #106920)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix SDWA commuting (PR #106920)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix SDWA commuting (PR #106920)
Matt Arsenault via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Matt Arsenault via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Matt Arsenault via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
Matt Arsenault via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Matt Arsenault via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Matt Arsenault via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Matt Arsenault via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Matt Arsenault via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Matt Arsenault via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Use CCValAssign::getCustomReg for converting f16/f32<->GPR. (PR #105700)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107091)
Matt Arsenault via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
Matt Arsenault via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] V_SET_INACTIVE optimizations (PR #98864)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LDS] Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107092)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LDS] Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107092)
Matt Arsenault via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Matt Arsenault via llvm-commits
- [llvm] [WIP][AMDGPU] eliminate frame index v_add (PR #106060)
Matt Arsenault via llvm-commits
- [llvm] [Patchpoint] Add immarg attributes to patchpoint arguments (PR #97276)
Matt Arsenault via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Matt Arsenault via llvm-commits
- [llvm] Reland "Revert "AtomicExpand: Allow incrementally legalizing atomicrmw"" (PR #106793)
Matt Arsenault via llvm-commits
- [llvm] Reland "Revert "AtomicExpand: Allow incrementally legalizing atomicrmw"" (PR #106793)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
Matt Arsenault via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] V_SET_INACTIVE optimizations (PR #98864)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Matt Arsenault via llvm-commits
- [llvm] SelectionDAG: Use qNaN constant if FCANONICALIZE not LegalOrCustom (PR #104564)
Matt Arsenault via llvm-commits
- [llvm] SelectionDAG: Use qNaN constant if FCANONICALIZE not LegalOrCustom (PR #104564)
Matt Arsenault via llvm-commits
- [llvm] SelectionDAG: Use qNaN constant if FCANONICALIZE not LegalOrCustom (PR #104564)
Matt Arsenault via llvm-commits
- [llvm] SelectionDAG: Use qNaN constant if FCANONICALIZE not LegalOrCustom (PR #104564)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Matt Arsenault via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
Matt Arsenault via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
Matt Arsenault via llvm-commits
- [llvm] [Patchpoint] Add immarg attributes to patchpoint arguments (PR #97276)
Matt Arsenault via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Matt Arsenault via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Matt Arsenault via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Matt Arsenault via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107091)
Matt Arsenault via llvm-commits
- [llvm] [mlir] eliminating g++ warnings (PR #105520)
Matt Arsenault via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Matt Arsenault via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Matt Arsenault via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Matt Arsenault via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Matt Arsenault via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Update live intervals in convertToThreeAddress (PR #104610)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Update live intervals in convertToThreeAddress (PR #104610)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Docs] Update product names for some targets (PR #106973)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add image_atomic_fmin/fmax as aliases for GFX12 (PR #107242)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Update live intervals in convertToThreeAddress (PR #104610)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Update live intervals in convertToThreeAddress (PR #104610)
Matt Arsenault via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LDS] Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107092)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
Matt Arsenault via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Overload resource descriptor in image intrinsics. (PR #107255)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Matt Arsenault via llvm-commits
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- [llvm] DAG: Handle lowering unordered compare with inf (PR #100378)
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- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
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- [llvm] [Windows SEH] Fix crash on empty seh block (PR #107031)
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- [llvm] [Windows SEH] Fix crash on empty seh block (PR #107031)
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- [llvm] [AMDGPU] Add image_atomic_fmin/fmax as aliases for GFX12 (PR #107242)
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- [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)
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- [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)
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- [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)
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- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
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- [llvm] [Target] Use templated MachineFunction::getSubtarget in *CallingConv.td. NFC (PR #107311)
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- [llvm] [CodeGen][NewPM] Use verify-each option in npm tests (NFC). (PR #107373)
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- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
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- [llvm] DAG: Handle lowering unordered compare with inf (PR #100378)
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- [llvm] DAG: Lower single infinity is.fpclass tests to fcmp (PR #100380)
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- [llvm] DAG: Lower single infinity is.fpclass tests to fcmp (PR #100380)
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- [llvm] DAG: Lower single infinity is.fpclass tests to fcmp (PR #100380)
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- [llvm] DAG: Lower single infinity is.fpclass tests to fcmp (PR #100380)
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- [llvm] DAG: Lower fcNormal is.fpclass to compare with inf (PR #100389)
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- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
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- [llvm] DAG: Lower fcNormal is.fpclass to compare with inf (PR #100389)
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- [llvm] AMDGPU: Add f64 to f32 support for llvm.fptrunc.round (PR #107481)
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- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
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- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
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- [llvm] DAG: Lower fcNormal is.fpclass to compare with inf (PR #100389)
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- [llvm] DAG: Lower fcNormal is.fpclass to compare with inf (PR #100389)
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- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
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- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
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- [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)
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- [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)
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- [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)
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- [llvm] AMDGPU: Update live intervals in convertToThreeAddress (PR #104610)
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- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
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- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
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- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
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- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
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- [llvm] SelectionDAG: Remove unneeded getSelectCC in expandFMINIMUMNUM_FMAXIMUMNUM (PR #107416)
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- [llvm] SelectionDAG: Remove unneeded getSelectCC in expandFMINIMUMNUM_FMAXIMUMNUM (PR #107416)
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- [llvm] [MIPS] Fix -msingle-float doesn't work with O32 (PR #107543)
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- [llvm] DAG: Lower fcNormal is.fpclass to compare with inf (PR #100389)
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- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
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- [llvm] DONT_MERGE: Reland "AtomicExpand: Allow incrementally legalizing atomicrmw" (PR #107309)
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- [llvm] DONT_MERGE: Reland "AtomicExpand: Allow incrementally legalizing atomicrmw" (PR #107309)
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- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
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- [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)
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- [llvm] AMDGPU: Update live intervals in convertToThreeAddress (PR #104610)
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- [llvm] AMDGPU: Update live intervals in convertToThreeAddress (PR #104610)
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- [llvm] 100d9b8 - Reapply "AtomicExpand: Allow incrementally legalizing atomicrmw" (#107307)
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- [llvm] DONT_MERGE: Reland "AtomicExpand: Allow incrementally legalizing atomicrmw" (PR #107309)
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- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
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- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Matt Arsenault via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Matt Arsenault via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Matt Arsenault via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Matt Arsenault via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Matt Arsenault via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
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- [llvm] AArch64: Add FCANONICALIZE and FMINNUM_IEEE support (PR #104429)
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- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
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- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Matt Arsenault via llvm-commits
- [llvm] AtomicExpand: Allow incrementally legalizing atomicrmw (PR #103371)
Matt Arsenault via llvm-commits
- [llvm] AtomicExpand: Allow incrementally legalizing atomicrmw (PR #103371)
Matt Arsenault via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Matt Arsenault via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Matt Arsenault via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Matt Arsenault via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Matt Arsenault via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Matt Arsenault via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Matt Arsenault via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Matt Arsenault via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Fix InstructionCount remarks for MI bundles (PR #107621)
Matt Arsenault via llvm-commits
- [llvm] df13862 - AMDGPU: Remove unnecessary pointer bitcast
Matt Arsenault via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Matt Arsenault via llvm-commits
- [llvm] [GISel] Use Function::getFunctionType() instead of getType() in some remarks. (PR #107651)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Overload image atomic swap to allow float as well. (PR #107283)
Matt Arsenault via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
Matt Arsenault via llvm-commits
- [llvm] [mlir] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Overload resource descriptor in image intrinsics. (PR #107255)
Matt Arsenault via llvm-commits
- [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
Matt Arsenault via llvm-commits
- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
Matt Arsenault via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Matt Arsenault via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Fix InstructionCount remarks for MI bundles (PR #107621)
Matt Arsenault via llvm-commits
- [llvm] [NFC][TableGen] Migrate LLVM Attribute Emitter to const RecordKeeper (PR #107698)
Matt Arsenault via llvm-commits
- [llvm] [llvm-ml] Adds /quiet flag to llvm-ml (PR #107308)
Matt Bolitho via llvm-commits
- [llvm] [llvm-ml] Adds /quiet flag to llvm-ml (PR #107308)
Matt Bolitho via llvm-commits
- [llvm] [llvm-ml] Adds /quiet flag to llvm-ml (PR #107308)
Matt Bolitho via llvm-commits
- [llvm] [LLVM][AArch64] Enable verifyTargetSDNode for scalable vectors and fix the fallout. (PR #104820)
Matthew Devereau via llvm-commits
- [llvm] [ArgPromotion] Perform alias analysis on actual arguments of Calls (PR #106216)
Matthew Devereau via llvm-commits
- [llvm] [ArgPromotion] Perform alias analysis on actual arguments of Calls (PR #106216)
Matthew Devereau via llvm-commits
- [llvm] [ArgPromotion] Perform alias analysis on actual arguments of Calls (PR #106216)
Matthew Devereau via llvm-commits
- [llvm] [ArgPromotion] Perform alias analysis on actual arguments of Calls (PR #106216)
Matthew Devereau via llvm-commits
- [llvm] [Security] Nominate Matthew Voss to replace Paul Robinson on the Secu… (PR #106112)
Matthew Voss via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Matthias Springer via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Matthias Springer via llvm-commits
- [clang] [compiler-rt] [libcxx] [lldb] [llvm] Rename Sanitizer Coverage => Coverage Sanitizer (PR #106505)
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- [llvm] [NFC][Support] Refactor FormatVariadic code. (PR #106610)
Mehdi Amini via llvm-commits
- [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)
Mehdi Amini via llvm-commits
- [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)
Mehdi Amini via llvm-commits
- [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)
Mel Chen via llvm-commits
- [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)
Mel Chen via llvm-commits
- [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)
Mel Chen via llvm-commits
- [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)
Mel Chen via llvm-commits
- [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)
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- [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)
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- [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)
Michael Jones via llvm-commits
- [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)
Michael Jones via llvm-commits
- [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)
Michael Jones via llvm-commits
- [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)
Michael Jones via llvm-commits
- [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)
Michael Jones via llvm-commits
- [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)
Michael Jones via llvm-commits
- [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)
Michael Jones via llvm-commits
- [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)
Michael Jones via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Michael Jones via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Michael Jones via llvm-commits
- [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)
Michael Klemm via llvm-commits
- [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)
Michael Klemm via llvm-commits
- [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)
Michael Klemm via llvm-commits
- [llvm] 8e4b815 - [M68k] Fix compilation pipeline check
Michael Liao via llvm-commits
- [llvm] [RISCV][SiFive7] Change `Latency` of VCIX to the default (PR #106497)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [RISCV][SiFive7] Change `Latency` of VCIX to the default (PR #106497)
Michael Maitland via llvm-commits
- [llvm] MTM: improve operand latency when missing sched info (PR #101389)
Michael Maitland via llvm-commits
- [llvm] MTM: improve operand latency when missing sched info (PR #101389)
Michael Maitland via llvm-commits
- [llvm] MTM: improve operand latency when missing sched info (PR #101389)
Michael Maitland via llvm-commits
- [llvm] MTM: improve operand latency when missing sched info (PR #101389)
Michael Maitland via llvm-commits
- [clang] [llvm] [Driver] Default -msmall-data-limit= to 0 and clean up code (PR #83093)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Support fastcc passing scalable vectors indirectly with no free GPRs. (PR #107623)
Michael Maitland via llvm-commits
- [llvm] [MachinePipeliner] Make Recurrence MII More Accurate (PR #105475)
Michael Marjieh via llvm-commits
- [llvm] [MachinePipeliner] Make Recurrence MII More Accurate (PR #105475)
Michael Marjieh via llvm-commits
- [llvm] [MachinePipeliner] Make Recurrence MII More Accurate (PR #105475)
Michael Marjieh via llvm-commits
- [llvm] [MachinePipeliner] Make Recurrence MII More Accurate (PR #105475)
Michael Marjieh via llvm-commits
- [llvm] [MachinePipeliner] Make Recurrence MII More Accurate (PR #105475)
Michael Marjieh via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #107493)
Michael Toguchi via llvm-commits
- [llvm] [SPIR-V] Improve correctness of emitted MIR between passes for branching instructions (PR #106966)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Ensure that OpExtInst instructions generated by NonSemantic_Shader_DebugInfo_100 are not mixed up with other OpExtInst instructions (PR #107007)
Michal Paszkowski via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)
Michal Paszkowski via llvm-commits
- [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)
Michal Rostecki via llvm-commits
- [llvm] [LangRef] Refine header for "Preserving DI Intrinsics" section (PR #67908)
Michal Rostecki via llvm-commits
- [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)
Michal Rostecki via llvm-commits
- [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)
Michal Rostecki via llvm-commits
- [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)
Michal Rostecki via llvm-commits
- [llvm] [RISCV][SiFive7] Change `Latency` of VCIX to the default (PR #106497)
Michal Terepeta via llvm-commits
- [llvm] [RISCV][SiFive7] Change `Latency` of VCIX to the default (PR #106497)
Michal Terepeta via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Mikael Holmén via llvm-commits
- [llvm] [DFAJumpThreading] Rewrite the way paths are enumerated (PR #96127)
Mikael Holmén via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Find types hidden in DbgRecords (PR #106547)
Mikael Holmén via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
Mikael Holmén via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
Mikael Holmén via llvm-commits
- [libc] [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [libc] [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
Mikhail R. Gadelha via llvm-commits
- [llvm] [M68k] Introduce more MOVI cases (PR #98377)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Min-Yih Hsu via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Min-Yih Hsu via llvm-commits
- [lld] [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (PR #106670)
Mingming Liu via llvm-commits
- [lld] [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (PR #106670)
Mingming Liu via llvm-commits
- [lld] [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (PR #106670)
Mingming Liu via llvm-commits
- [lld] [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (PR #106670)
Mingming Liu via llvm-commits
- [lld] [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (PR #106670)
Mingming Liu via llvm-commits
- [lld] [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (PR #106670)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [NFC] Rename the `Nr` abbreviation to `Num` (PR #107151)
Mingming Liu via llvm-commits
- [lld] [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (PR #106670)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Clean up synthetic count (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Clean up synthetic count pass (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Clean up synthetic count pass (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Clean up synthetic count pass (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO]Use UniqueStringSaver to de-duplicate strings (PR #106176)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [llvm] [LTO] Fix a unused variable error (PR #107660)
Mingming Liu via llvm-commits
- [llvm] [LTO] Fix a unused variable error (PR #107660)
Mingming Liu via llvm-commits
- [llvm] [LTO] Fix a unused variable error (PR #107660)
Mingming Liu via llvm-commits
- [llvm] [LTO] Fix a unused variable error (PR #107660)
Mingming Liu via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Use DenseMap for OidGuidMap (PR #107725)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [llvm] [NFCI][BitcodeReader]Read real GUID from VI as opposed to storing it in map (PR #107735)
Mingming Liu via llvm-commits
- [llvm] [NFCI][BitcodeReader]Read real GUID from VI as opposed to storing it in map (PR #107735)
Mingming Liu via llvm-commits
- [llvm] [NFCI][BitcodeReader]Read real GUID from VI as opposed to storing it in map (PR #107735)
Mingming Liu via llvm-commits
- [llvm] [NFCI][BitcodeReader]Read real GUID from VI as opposed to storing it in map (PR #107735)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [llvm] [NFCI][BitcodeReader]Read real GUID from VI as opposed to storing it in map (PR #107735)
Mingming Liu via llvm-commits
- [lld] [llvm] Revert "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107788)
Mingming Liu via llvm-commits
- [lld] [llvm] Revert "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107788)
Mingming Liu via llvm-commits
- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)
Mingming Liu via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [NFC] Rename the `Nr` abbreviation to `Num` (PR #107151)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [clang] [llvm] Introduce -defer-thinlto-prelink-coro-split that skips Coro passes in ThinLTO pre-link pipeline (PR #107153)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] 16dc65b - [mlgo] Fix test post - #106744
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [NFC] Rename the `Nr` abbreviation to `Num` (PR #107151)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [NFC] Rename the `Nr` abbreviation to `Num` (PR #107151)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)
Mircea Trofin via llvm-commits
- [llvm] dc62bc8 - [nfc][ctx_prof] Remove spurious `#include` in PGOCtxProfFlattening.cpp
Mircea Trofin via llvm-commits
- [llvm] 644c902 - [ctx_prof] Fix nondeterminism in CtxProfAnalysisPrinterPass
Mircea Trofin via llvm-commits
- [llvm] d7fb5b9 - [ctx_prof] PGOCtxProfFlattener must always return `PreservedAnalyses::none()`
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)
Mircea Trofin via llvm-commits
- [llvm] 1d2da21 - [nfc][ctx_prof] Test comments and more clarity in values.
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Mircea Trofin via llvm-commits
- [llvm] fe6c025 - [nfc][ctx_prof] Fix the second source of nondeterminism in `CtxProfAnalysisPrinterPass`
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)
Mircea Trofin via llvm-commits
- [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)
Mircea Trofin via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement NEON vamin/vamax intrinsics (PR #99041)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement intrinsics for SVE FAMIN/FAMAX (PR #99042)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement intrinsics for SVE FAMIN/FAMAX (PR #99042)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement intrinsics for SVE FAMIN/FAMAX (PR #99042)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement intrinsics for SVE FAMIN/FAMAX (PR #99042)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement intrinsics for SME2 FAMIN/FAMAX (PR #99063)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement NEON vamin/vamax intrinsics (PR #99041)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement NEON vamin/vamax intrinsics (PR #99041)
Momchil Velikov via llvm-commits
- [clang] [llvm] [AArch64] Implement NEON vamin/vamax intrinsics (PR #99041)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] replace SVE intrinsics with no active lanes with zero (PR #107413)
Momchil Velikov via llvm-commits
- [llvm] [LoopPeel] Added support for cases where PhiAnalyzer contains Induction PHI (PR #94900)
Moriyuki Saito via llvm-commits
- [clang] [llvm] [MC] Emit a jump table size section (PR #101962)
Nabeel Omer via llvm-commits
- [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)
Nabeel Omer via llvm-commits
- [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)
Nabeel Omer via llvm-commits
- [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)
Nabeel Omer via llvm-commits
- [clang] [llvm] [MC] Emit a jump table size section (PR #101962)
Nabeel Omer via llvm-commits
- [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)
Nabeel Omer via llvm-commits
- [llvm] [llvm][ARM][CodeGen] Disable MEMCPY LDM/STM inlining for v7-m (PR #106378)
Nashe Mncube via llvm-commits
- [llvm] [llvm][ARM][CodeGen] Disable MEMCPY LDM/STM inlining for v7-m (PR #106378)
Nashe Mncube via llvm-commits
- [llvm] [llvm][ARM][CodeGen] Disable MEMCPY LDM/STM inlining for Cortex v7-m (PR #106378)
Nashe Mncube via llvm-commits
- [llvm] [llvm][ARM][CodeGen] Disable MEMCPY LDM/STM inlining for Cortex v7-m (PR #106378)
Nashe Mncube via llvm-commits
- [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)
Nashe Mncube via llvm-commits
- [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #104020)
Nathan Gauër via llvm-commits
- [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #104020)
Nathan Gauër via llvm-commits
- [clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)
Nathan Gauër via llvm-commits
- [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #104020)
Nathan Gauër via llvm-commits
- [llvm] Revert "[Utils][SPIR-V] Adding spirv-sim to LLVM" (PR #107084)
Nathan Gauër via llvm-commits
- [llvm] Revert "[Utils][SPIR-V] Adding spirv-sim to LLVM" (PR #107084)
Nathan Gauër via llvm-commits
- [llvm] Revert "[Utils][SPIR-V] Adding spirv-sim to LLVM" (PR #107084)
Nathan Gauër via llvm-commits
- [llvm] Revert "[Utils][SPIR-V] Adding spirv-sim to LLVM" (PR #107084)
Nathan Gauër via llvm-commits
- [llvm] Revert "[Utils][SPIR-V] Adding spirv-sim to LLVM" (PR #107084)
Nathan Gauër via llvm-commits
- [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)
Nathan Gauër via llvm-commits
- [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)
Nathan Gauër via llvm-commits
- [clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)
Nathan Gauër via llvm-commits
- [clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)
Nathan Gauër via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Nathan Gauër via llvm-commits
- [llvm] b6597f5 - [gn] port 1e65b765879fb39
Nico Weber via llvm-commits
- [llvm] 7764959 - [gn/mac] bump HOST_LINK_VERSION to 520
Nico Weber via llvm-commits
- [llvm] [llvm-ml] Adds /quiet flag to llvm-ml (PR #107308)
Nico Weber via llvm-commits
- [lld] [lld/mac] Allow -segprot having stricter initprot than maxprot on mac (PR #107269)
Nico Weber via llvm-commits
- [lld] [lld/mac] Allow -segprot having stricter initprot than maxprot on mac (PR #107269)
Nico Weber via llvm-commits
- [lld] [lld/mac] Allow -segprot having stricter initprot than maxprot on mac (PR #107269)
Nico Weber via llvm-commits
- [llvm] [gn build] Allow specifying macOS deployment target (PR #107492)
Nico Weber via llvm-commits
- [llvm] a84baef - [gn build] Port 52dca6ffae08
Nico Weber via llvm-commits
- [llvm] [gn build] Allow specifying macOS deployment target (PR #107492)
Nico Weber via llvm-commits
- [llvm] 9d12d93 - [gn] port 1f70fcefa981e6e2b
Nico Weber via llvm-commits
- [llvm] [llvm-ml] Adds /quiet flag to llvm-ml (PR #107308)
Nico Weber via llvm-commits
- [llvm] Revert "Reland "AtomicExpand: Allow incrementally legalizing atomicrmw"" (PR #107307)
Nico Weber via llvm-commits
- [llvm] AtomicExpand: Allow incrementally legalizing atomicrmw (PR #103371)
Nico Weber via llvm-commits
- [llvm] AtomicExpand: Allow incrementally legalizing atomicrmw (PR #103371)
Nico Weber via llvm-commits
- [llvm] 7f77db4 - [gn] port 5d146c689e28
Nico Weber via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
Nico Weber via llvm-commits
- [llvm] 78315a3 - [gn] port 787cd8f0fee8 (llvm-profdata debuginfod dep)
Nico Weber via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
Nico Weber via llvm-commits
- [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)
Nicolai Hähnle via llvm-commits
- [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)
Nicolai Hähnle via llvm-commits
- [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)
Nicolai Hähnle via llvm-commits
- [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)
Nicolai Hähnle via llvm-commits
- [llvm] [InstCombine] Make backedge check in op of phi transform more precise (PR #106075)
Nikita Popov via llvm-commits
- [clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)
Nikita Popov via llvm-commits
- [llvm] [APInt] Add default-disabled assertion to APInt constructor (PR #106524)
Nikita Popov via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Nikita Popov via llvm-commits
- [llvm] 34b10e1 - [InstCombine] Remove optional LoopInfo dependency
Nikita Popov via llvm-commits
- [clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)
Nikita Popov via llvm-commits
- [llvm] [BasicAA] Track nuw through decomposed expressions (PR #106512)
Nikita Popov via llvm-commits
- [llvm] 5dcea46 - [AutoUpgrade] Preserve attributes when upgrading named struct return
Nikita Popov via llvm-commits
- [llvm] 224112f - [ARM] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] 0c0bac9 - [InstCombine] Add additional tests for arm intrinsic alignment (NFC)
Nikita Popov via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Nikita Popov via llvm-commits
- [llvm] [ARM] Do not assume alignment in vld1xN and vst1xN intrinsics (PR #106984)
Nikita Popov via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Nikita Popov via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Nikita Popov via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Nikita Popov via llvm-commits
- [llvm] [LTO] Don't make unnecessary copies of ImportIDTable (PR #106998)
Nikita Popov via llvm-commits
- [llvm] [LTO] Don't make unnecessary copies of ImportIDTable (PR #106998)
Nikita Popov via llvm-commits
- [llvm] [LTO] Don't make unnecessary copies of ImportIDTable (PR #106998)
Nikita Popov via llvm-commits
- [llvm] [CodeGen] Add generic INIT_UNDEF pseudo (PR #106744)
Nikita Popov via llvm-commits
- [llvm] [CodeGen] Add generic INIT_UNDEF pseudo (PR #106744)
Nikita Popov via llvm-commits
- [llvm] [CodeGen] Add generic INIT_UNDEF pseudo (PR #106744)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Generalize and consolidate phi translation check (PR #106051)
Nikita Popov via llvm-commits
- [llvm] fe1a1ee - [Tests] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Nikita Popov via llvm-commits
- [llvm] 52b8795 - [LoopUnroll] Avoid undef values in test (NFC)
Nikita Popov via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Nikita Popov via llvm-commits
- [llvm] LICM: use IRBuilder in hoist BO assoc (PR #106978)
Nikita Popov via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Nikita Popov via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Nikita Popov via llvm-commits
- [llvm] LICM: use IRBuilder in hoist BO assoc (PR #106978)
Nikita Popov via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Nikita Popov via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Nikita Popov via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Nikita Popov via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Nikita Popov via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Nikita Popov via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Nikita Popov via llvm-commits
- [llvm] [WIP][DAG] Improve the knownbits of CTPOP/LZ/TZ based off the min/max counts of the input value (PR #107085)
Nikita Popov via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Nikita Popov via llvm-commits
- [llvm] c80cabf - [SCCP] Avoid use of undef value in test (NFC)
Nikita Popov via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Nikita Popov via llvm-commits
- [llvm] 0797c18 - [SCCP] Explicitly mark gep as overdefined if ct eval fails
Nikita Popov via llvm-commits
- [llvm] [ValueLattice][SCCP] Do not track undefs (PR #107105)
Nikita Popov via llvm-commits
- [clang] [llvm] [ValueLattice][SCCP] Do not track undefs (PR #107105)
Nikita Popov via llvm-commits
- [clang] [llvm] [ValueLattice][SCCP] Do not track undefs (PR #107105)
Nikita Popov via llvm-commits
- [clang] [flang] [llvm] [mlir] [ADT] Deprecate DenseMap::getOrInsertDefault (PR #107040)
Nikita Popov via llvm-commits
- [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)
Nikita Popov via llvm-commits
- [llvm] LICM/test: regen a test with UTC (NFC) (PR #107117)
Nikita Popov via llvm-commits
- [llvm] Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (PR #106770)
Nikita Popov via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Nikita Popov via llvm-commits
- [llvm] [SLPVectorizer] Use DenseMap::{find, try_emplace} (NFC) (PR #107123)
Nikita Popov via llvm-commits
- [llvm] [LV] Prefer FLT_MIN/MAX for fmin/fmax reductions with ninf (PR #107141)
Nikita Popov via llvm-commits
- [llvm] [SLPVectorizer] Avoid two successive hash lookups on the same key (PR #107143)
Nikita Popov via llvm-commits
- [llvm] [APInt] improve initialization performance (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [SROA] Use SetVector for PromotableAllocas (PR #105809)
Nikita Popov via llvm-commits
- [llvm] [SROA] Use SetVector for PromotableAllocas (PR #105809)
Nikita Popov via llvm-commits
- [llvm] [ThinLTO] Avoid repeated std::map lookups (NFC) (PR #107156)
Nikita Popov via llvm-commits
- [llvm] [APInt] improve initialization performance (PR #106945)
Nikita Popov via llvm-commits
- [llvm] [XRay] Use DenseMap::{operator[], try_emplace} (NFC) (PR #107178)
Nikita Popov via llvm-commits
- [llvm] [XRay] Use DenseMap::{operator[], try_emplace} (NFC) (PR #107178)
Nikita Popov via llvm-commits
- [llvm] [XRay] Use DenseMap::{operator[], try_emplace} (NFC) (PR #107178)
Nikita Popov via llvm-commits
- [llvm] [SSAUpdater] Use DenseMap::operator[] (NFC) (PR #107179)
Nikita Popov via llvm-commits
- [llvm] [SimplifyCFG] Use range-based for loops (NFC) (PR #107180)
Nikita Popov via llvm-commits
- [llvm] [SimplifyCFG] Use range-based for loops (NFC) (PR #107180)
Nikita Popov via llvm-commits
- [llvm] [SimplifyCFG] Use range-based for loops (NFC) (PR #107180)
Nikita Popov via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
Nikita Popov via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Nikita Popov via llvm-commits
- [llvm] 29c076b - [Lint] Fix crash with scalable alloca
Nikita Popov via llvm-commits
- [llvm] 360f82f - [Lint] Fix crash for insert/extract on scalable vector
Nikita Popov via llvm-commits
- [llvm] 8d4235d - [Lint] Fix another scalable vector crash
Nikita Popov via llvm-commits
- [llvm] 55a2473 - [CtxProf] Replace include with forward declaration (NFC)
Nikita Popov via llvm-commits
- [llvm] [ADT] Deprecate DenseMap::FindAndConstruct (PR #107224)
Nikita Popov via llvm-commits
- [llvm] [SROA] Use SetVector for PromotableAllocas (PR #105809)
Nikita Popov via llvm-commits
- [llvm] IVDescriptors: improve readability of a function (NFC) (PR #106219)
Nikita Popov via llvm-commits
- [llvm] 205f7ee - [Lint] Skip null args when checking noalias
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Generalize and consolidate phi translation check (PR #106051)
Nikita Popov via llvm-commits
- [clang] [llvm] [SPARC] Align i128 to 16 bytes in SPARC datalayouts (PR #106951)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
Nikita Popov via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
Nikita Popov via llvm-commits
- [llvm] [ARM] Do not assume alignment in vld1xN and vst1xN intrinsics (PR #106984)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
Nikita Popov via llvm-commits
- [llvm] [ARM] Avoid repeated hash lookups (NFC) (PR #107356)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
Nikita Popov via llvm-commits
- [llvm] [CodeGen] Add generic INIT_UNDEF pseudo (PR #106744)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds (PR #104580)
Nikita Popov via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Nikita Popov via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Nikita Popov via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Nikita Popov via llvm-commits
- [llvm] 03d5b7c - [MemorySanitizer] Don't create types pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Nikita Popov via llvm-commits
- [llvm] LIR: strip unused LAA header dependency (NFC) (PR #107382)
Nikita Popov via llvm-commits
- [llvm] LoopSimplify: strip unused pass dependencies (NFC) (PR #107379)
Nikita Popov via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Nikita Popov via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Nikita Popov via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Nikita Popov via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Nikita Popov via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Nikita Popov via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
Nikita Popov via llvm-commits
- [llvm] 7d1a681 - [SystemZ] Use APInt::getAllOnes()
Nikita Popov via llvm-commits
- [llvm] 9e9971b - [PatternMatchTest] Use APInt::getAllOnes() (NFC)
Nikita Popov via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Nikita Popov via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Nikita Popov via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Nikita Popov via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Nikita Popov via llvm-commits
- [llvm] 9707b98 - [ConstantRange] Perform increment on APInt (NFC)
Nikita Popov via llvm-commits
- [llvm] 9e85efb - [ConstantRangeTest] Set APInt signed flags where needed (NFC)
Nikita Popov via llvm-commits
- [clang] [lldb] [llvm] [mlir] [APInt] Assert correct values in APInt constructor (PR #80309)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Nikita Popov via llvm-commits
- [llvm] [CodeGen] Add generic INIT_UNDEF pseudo (PR #106744)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)
Nikita Popov via llvm-commits
- [llvm] [IndVars] Avoid repeated hash lookups (NFC) (PR #107513)
Nikita Popov via llvm-commits
- [llvm] [IRSim] Avoid repeated hash lookups (NFC) (PR #107510)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Nikita Popov via llvm-commits
- [llvm] [LSR] Do not create duplicated PHI nodes while preserving LCSSA form (PR #107380)
Nikita Popov via llvm-commits
- [llvm] [SCEVExpander] Fix addrec cost model (PR #106704)
Nikita Popov via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Nikita Popov via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Nikita Popov via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Nikita Popov via llvm-commits
- [llvm] [SROA] Conservatively do not split the alloca if ptr is laundered (PR #107557)
Nikita Popov via llvm-commits
- [llvm] [SROA] Conservatively do not split the alloca if ptr is laundered (PR #107557)
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- [llvm] [MemCpyOpt] Drop dead `memmove` calls on `memset`'d source data (PR #101930)
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- [llvm] [MemCpyOpt] Drop dead `memmove` calls on `memset`'d source data (PR #101930)
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- [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)
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- [libcxx] [llvm] [libc++] Remove `get_temporary_buffer`/`return_temporary_buffer` (PR #100914)
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- [llvm] [ARM] Fix failure to register-allocate CMP_SWAP_64 pseudo-inst (PR #106721)
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- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
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- [llvm] [WIP][AMDGPU] eliminate frame index v_add (PR #106060)
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- [llvm] [AVR] Fix parsing & emitting relative jumps (PR #102936)
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- [llvm] [AVR] Fix parsing & emitting relative jumps (PR #102936)
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- [llvm] [AVR] Reformat MC tests (PR #107068)
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- [lld] [lld][llvm-lit] Enabled lit internal shell for lld test suite (PR #106651)
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- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
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- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
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- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Paul Kirth via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Paul Kirth via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Paul Kirth via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Paul Kirth via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Paul Kirth via llvm-commits
- [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)
Paul Walker via llvm-commits
- [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)
Paul Walker via llvm-commits
- [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)
Paul Walker via llvm-commits
- [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)
Paul Walker via llvm-commits
- [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)
Paul Walker via llvm-commits
- [llvm] [LLVM][AArch64] Enable verifyTargetSDNode for scalable vectors and fix the fallout. (PR #104820)
Paul Walker via llvm-commits
- [llvm] [LLVM][CodeGen][SVE] Implement nxvbf16 fpextend to nxvf32/nxvf64. (PR #107253)
Paul Walker via llvm-commits
- [llvm] [LLVM][CodeGen][SVE] Implement nxvbf16 fpextend to nxvf32/nxvf64. (PR #107253)
Paul Walker via llvm-commits
- [llvm] [LLVM][AArch64] Refactor sve-b16b16 instruction definitions. (PR #107265)
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- [llvm] [SVE2.1][AArch64] Fix crash for bfadd with scalable vector types (PR #107274)
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- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
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- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
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- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
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Paul Walker via llvm-commits
- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
Paul Walker via llvm-commits
- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
Paul Walker via llvm-commits
- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
Paul Walker via llvm-commits
- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
Paul Walker via llvm-commits
- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
Paul Walker via llvm-commits
- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
Paul Walker via llvm-commits
- [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)
Paul Walker via llvm-commits
- [llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)
Paul Walker via llvm-commits
- [llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)
Paul Walker via llvm-commits
- [llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)
Paul Walker via llvm-commits
- [llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)
Paul Walker via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
Paul Walker via llvm-commits
- [llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)
Paul Walker via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Paul Walker via llvm-commits
- [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)
Paul Walker via llvm-commits
- [llvm] [LLVM][CodeGen][SVE] Implement nxvbf16 fpextend to nxvf32/nxvf64. (PR #107253)
Paul Walker via llvm-commits
- [llvm] [LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (PR #107420)
Paul Walker via llvm-commits
- [llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)
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- [llvm] Reapply "[llvm/DWARF] Recursively resolve DW_AT_signature references"… (PR #99495)
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Pavel Labath via llvm-commits
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Pavel Labath via llvm-commits
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Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
Pavel Labath via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
- [llvm] [RISCV] Remove RISCVISD::FP_EXTEND_BF16. (PR #106939)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (PR #106948)
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- [llvm] [RISCV] Added new register class GPRNoGPRS defined as substraction of GPRC sequences from GPR (PR #106974)
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- [llvm] [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (PR #106948)
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- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Remove pre-assignment of mask vectors during call lowering. (PR #107192)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Select zero splats of EEW=64 on RV32 (PR #107205)
Pengcheng Wang via llvm-commits
- [llvm] [LV] Use ICMP_UGE for BranchOnCount when VF is scalable (PR #102575)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (PR #107361)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV][MI] Support partial spill/reload for vector registers (PR #105661)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Added new register class GPRNoGPRS defined as substraction of GPRC sequences from GPR (PR #106974)
Pengcheng Wang via llvm-commits
- [llvm] [M68k] Introduce more MOVI cases (PR #98377)
Peter Lafreniere via llvm-commits
- [llvm] [M68k] Introduce more MOVI cases (PR #98377)
Peter Lafreniere via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
Peter Rong via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
Peter Rong via llvm-commits
- [lld] [lld][InstrProf] Refactor BPSectionOrderer.cpp (PR #107347)
Peter Rong via llvm-commits
- [lld] [lld][InstrProf] Refactor BPSectionOrderer.cpp (PR #107347)
Peter Rong via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
Peter Rong via llvm-commits
- [lld] [lld][InstrProf] Refactor BPSectionOrderer.cpp (PR #107347)
Peter Rong via llvm-commits
- [llvm] [BOLT] Enable cross compilation of runtime libraries (PR #101180)
Peter Waller via llvm-commits
- [llvm] [BOLT] Enable cross compilation of runtime libraries (PR #101180)
Peter Waller via llvm-commits
- [llvm] [BOLT] Enable cross compilation of runtime libraries (PR #101180)
Peter Waller via llvm-commits
- [llvm] [BOLT] Enable cross compilation of runtime libraries (PR #101180)
Peter Waller via llvm-commits
- [llvm] [BOLT] Enable cross compilation of runtime libraries (PR #101180)
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- [compiler-rt] [profile] Change __llvm_profile_counter_bias etc. types to match llvm (PR #102747)
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- [compiler-rt] [profile] Change __llvm_profile_counter_bias etc. types to match llvm (PR #102747)
Petr Hosek via llvm-commits
- [compiler-rt] [compiler-rt] [docs] Mention Windows as one of the supported OSes (PR #106874)
Petr Hosek via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Petr Hosek via llvm-commits
- [clang] [compiler-rt] [llvm] [CMake][compiler-rt] Support for using compiler-rt atomic library (PR #106603)
Petr Hosek via llvm-commits
- [clang] [compiler-rt] [llvm] [CMake][compiler-rt] Support for using compiler-rt atomic library (PR #106603)
Petr Hosek via llvm-commits
- [llvm] Avoid exposing password and token from git repositories (PR #105220)
Petr Hosek via llvm-commits
- [llvm] Avoid exposing password and token from git repositories (PR #105220)
Petr Hosek via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Petr Hosek via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Petr Hosek via llvm-commits
- [llvm] [CMake] Passthrough variables for packages to subbuilds (PR #107611)
Petr Hosek via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
Petr Hosek via llvm-commits
- [compiler-rt] [llvm] [Coverage] Ignore unused functions if the count is 0. (PR #107661)
Petr Hosek via llvm-commits
- [llvm] e1bde1c - [SDAG] Fix a typo in comment
Philip Reames via llvm-commits
- [llvm] [DAG] Prefer 0.0 over -0.0 as neutral value for FADD w/NoSignedZero (PR #106616)
Philip Reames via llvm-commits
- [llvm] [RISCV] Preserve tail agnostic policy in foldVMV_V_V (PR #105788)
Philip Reames via llvm-commits
- [llvm] [RISCV] Preserve tail agnostic policy in foldVMV_V_V (PR #105788)
Philip Reames via llvm-commits
- [llvm] [RISCV] Preserve tail agnostic policy in foldVMV_V_V (PR #105788)
Philip Reames via llvm-commits
- [llvm] [RISCV] Handle undef passthrus in foldVMV_V_V (PR #106943)
Philip Reames via llvm-commits
- [llvm] [RISCV] Handle undef passthrus in foldVMV_V_V (PR #106943)
Philip Reames via llvm-commits
- [llvm] [RISCV] Handle undef passthrus in foldVMV_V_V (PR #106943)
Philip Reames via llvm-commits
- [llvm] Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (PR #106770)
Philip Reames via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Philip Reames via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Philip Reames via llvm-commits
- [llvm] Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (PR #106770)
Philip Reames via llvm-commits
- [llvm] 0b2f253 - [LV] Separate AnyOf recurrence from getRecurrenceIdentity [NFC]
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)
Philip Reames via llvm-commits
- [llvm] [LV] Prefer FLT_MIN/MAX for fmin/fmax reductions with ninf (PR #107141)
Philip Reames via llvm-commits
- [llvm] [RISCV] Don't promote f16/bf16 SELECT with Zfhmin/Zfbfmin. (PR #107138)
Philip Reames via llvm-commits
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Philip Reames via llvm-commits
- [llvm] [RISCV] Bitcast fixed length bf16/f16 build_vector to i16 with Zvfbfmin/Zvfhmin+Zfbfmin/Zfhmin. (PR #106637)
Philip Reames via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (PR #107011)
Philip Reames via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (PR #107026)
Philip Reames via llvm-commits
- [llvm] [LV] Prefer FLT_MIN/MAX for fmin/fmax reductions with ninf (PR #107141)
Philip Reames via llvm-commits
- [llvm] 3e8840b - Remove "Target" from createXReduction naming [nfc]
Philip Reames via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Philip Reames via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Philip Reames via llvm-commits
- [llvm] 42b4092 - [RISCV] Precommit vmv.v.v with undef passthru tests
Philip Reames via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Philip Reames via llvm-commits
- [llvm] [RISCV] Fold PseudoVMV_V_V with undef passthru, handling policy (PR #106943)
Philip Reames via llvm-commits
- [llvm] [RISCV] Fold PseudoVMV_V_V with undef passthru, handling policy (PR #106943)
Philip Reames via llvm-commits
- [llvm] [RISCV] Fold PseudoVMV_V_V with undef passthru, handling policy (PR #106943)
Philip Reames via llvm-commits
- [llvm] [RISCV] Fold PseudoVMV_V_V with undef passthru, handling policy (PR #106943)
Philip Reames via llvm-commits
- [llvm] [RISCV] Model dest EEW and fix peepholes not checking EEW (PR #105945)
Philip Reames via llvm-commits
- [llvm] [RISCV] Model dest EEW and fix peepholes not checking EEW (PR #105945)
Philip Reames via llvm-commits
- [llvm] [RISCV] Model dest EEW and fix peepholes not checking EEW (PR #105945)
Philip Reames via llvm-commits
- [llvm] [Target] Use templated MachineFunction::getSubtarget in *CallingConv.td. NFC (PR #107311)
Philip Reames via llvm-commits
- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
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- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
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- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
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- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
Philip Reames via llvm-commits
- [llvm] [RISCV] Support fixed vector VP_LOAD/STORE for bf16 and f16 without Zvfh. (PR #107297)
Philip Reames via llvm-commits
- [llvm] [RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (PR #107361)
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Philip Reames via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Philip Reames via llvm-commits
- [llvm] [RISCV] Update V0Defs after moving Src in peepholes (PR #107359)
Philip Reames via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Philip Reames via llvm-commits
- [llvm] [RISCV] Update V0Defs after moving Src in peepholes (PR #107359)
Philip Reames via llvm-commits
- [llvm] [SLP] Enable reordering for non-power-of-two vectors (PR #106638)
Philip Reames via llvm-commits
- [llvm] 247d3ea - [SLP] Expand non-power-of-two bailout in TryToFindDuplicates
Philip Reames via llvm-commits
- [llvm] [RISCV] Add reductions to list of roots in tryToReduceVL (PR #107595)
Philip Reames via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Philip Reames via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Philip Reames via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Philip Reames via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
Philip Reames via llvm-commits
- [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)
Philip Reames via llvm-commits
- [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)
Philip Reames via llvm-commits
- [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)
Philip Reames via llvm-commits
- [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)
Philip Reames via llvm-commits
- [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)
Philip Reames via llvm-commits
- [llvm] [RISCV][TTI] Add vp.cmp intrinsic cost with functionalOPC. (PR #107504)
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Philip Reames via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
Philip Reames via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-BF16 new instructions. (PR #101603)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-BF16 new instructions. (PR #101603)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-BF16 new instructions. (PR #101603)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
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- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Phoebe Wang via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns [NFC] (PR #107374)
Phoebe Wang via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)
Phoebe Wang via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Phoebe Wang via llvm-commits
- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Phoebe Wang via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Phoebe Wang via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
Phoebe Wang via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
Phoebe Wang via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
Phoebe Wang via llvm-commits
- [llvm] Make a tablegen test match-table.td more robust. (PR #106508)
Pierre van Houtryve via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
Pierre van Houtryve via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
Pierre van Houtryve via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
Pierre van Houtryve via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to i32 in GISel (PR #106557)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)
Pierre van Houtryve via llvm-commits
- [llvm] [GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (PR #106702)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] Document & Finalize GFX12 Memory Model (PR #98599)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] Document & Finalize GFX12 Memory Model (PR #98599)
Pierre van Houtryve via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
Pierre van Houtryve via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] Document & Finalize GFX12 Memory Model (PR #98599)
Pierre van Houtryve via llvm-commits
- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
Piyou Chen via llvm-commits
- [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)
Pradeep Kumar via llvm-commits
- [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)
Pradeep Kumar via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (PR #106967)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (PR #106967)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (PR #106967)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (PR #106967)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
Pravin Jagtap via llvm-commits
- [llvm] [CodeGen][NewPM] Use verify-each option in npm tests (NFC). (PR #107373)
Pravin Jagtap via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] remove getClearedMemory and improve slow initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] avoid extra memset in initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] avoid extra memset in initialization (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] improve initialization performance (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] improve initialization performance (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [APInt] improve initialization performance (PR #106945)
Princeton Ferro via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Princeton Ferro via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Princeton Ferro via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Princeton Ferro via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Princeton Ferro via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Princeton Ferro via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
Princeton Ferro via llvm-commits
- [llvm] [MachineLICM] Work-around Incomplete RegUnits (PR #95926)
Quentin Colombet via llvm-commits
- [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)
Rahman Lavaee via llvm-commits
- [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)
Rahman Lavaee via llvm-commits
- [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)
Rahman Lavaee via llvm-commits
- [llvm] [TableGen] Assume `TypeSig` is always present for intrinsics (PR #106911)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [NFC][Support] Add FormatVariadic sub-test for validation (PR #106578)
Rahul Joshi via llvm-commits
- [llvm] [NFC][Support] Add FormatVariadic sub-test for validation (PR #106578)
Rahul Joshi via llvm-commits
- [llvm] [NFC][Support] Add FormatVariadic sub-test for validation (PR #106578)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Refactor `getIntrinsicFnAttributeSet` (PR #106587)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Refactor `getIntrinsicFnAttributeSet` (PR #106587)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Print memory stats in detailed record emitter (PR #106990)
Rahul Joshi via llvm-commits
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Rahul Joshi via llvm-commits
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Rahul Joshi via llvm-commits
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Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
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Rahul Joshi via llvm-commits
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Rahul Joshi via llvm-commits
- [llvm] [TableGen] Print memory stats in detailed record emitter (PR #106990)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Print memory stats in detailed record emitter (PR #106990)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Print memory stats in detailed record emitter (PR #106990)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Print memory stats in detailed record emitter (PR #106990)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [llvm] [NFC][Support] Refactor FormatVariadic code. (PR #106610)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Optimize intrinsic info type signature encoding (PR #106809)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Refactor Intrinsics record (PR #106986)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add error checks for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add error check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [NFC][Support] Refactor FormatVariadic code. (PR #106610)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [llvm] [NFC][Support] Refactor FormatVariadic code. (PR #106610)
Rahul Joshi via llvm-commits
- [llvm] [NFC][Support] Refactor FormatVariadic code. (PR #106610)
Rahul Joshi via llvm-commits
- [llvm] [NFC][Support] Refactor FormatVariadic code. (PR #106610)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [Support] Add automatic index assignment in formatv (PR #107459)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [TableGen] Add const variants of accessors for backend (PR #106658)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add check for number of intrinsic return values (PR #107326)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [Support] Add automatic index assignment in formatv (PR #107459)
Rahul Joshi via llvm-commits
- [llvm] [Support] Add automatic index assignment in formatv (PR #107459)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [libc] [llvm] [LIBC][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (PR #107542)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [libc] [llvm] [LIBC][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (PR #107542)
Rahul Joshi via llvm-commits
- [libc] [llvm] [LIBC][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (PR #107542)
Rahul Joshi via llvm-commits
- [libc] [llvm] [LIBC][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (PR #107542)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to use const RecordKe… (PR #107693)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate Opt/OptRST Emitters to cosst RecordKeeper (PR #107696)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (PR #107697)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate LLVM Attribute Emitter to const RecordKeeper (PR #107698)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate Opt/OptRST Emitters to cosst RecordKeeper (PR #107696)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
Rahul Joshi via llvm-commits
- [libc] [llvm] [libc][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (PR #107542)
Rahul Joshi via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Rahul Joshi via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Rahul Joshi via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (PR #107697)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (PR #107697)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate LLVM Attribute Emitter to const RecordKeeper (PR #107698)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate LLVM Attribute Emitter to const RecordKeeper (PR #107698)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Migrate LLVM Attribute Emitter to const RecordKeeper (PR #107698)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (PR #107697)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (PR #107697)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate Opt/OptRST Emitters to const RecordKeeper (PR #107696)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate Opt/OptRST Emitters to const RecordKeeper (PR #107696)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate Opt/OptRST Emitters to const RecordKeeper (PR #107696)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (PR #107697)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Replace DefInit::get() with Record::getDefInit() (PR #107762)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Replace DefInit::get() with Record::getDefInit() (PR #107762)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Replace DefInit::get() with Record::getDefInit() (PR #107762)
Rahul Joshi via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Rahul Joshi via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Rahul Joshi via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Replace DefInit::get() with Record::getDefInit() (PR #107762)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] Replace DefInit::get() with Record::getDefInit() (PR #107762)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (PR #107693)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)
Rahul Joshi via llvm-commits
- [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)
Rahul Joshi via llvm-commits
- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
Rahul Joshi via llvm-commits
- [compiler-rt] [profile] Change __llvm_profile_counter_bias etc. types to match llvm (PR #102747)
Rainer Orth via llvm-commits
- [compiler-rt] [profile] Change __llvm_profile_counter_bias etc. types to match llvm (PR #102747)
Rainer Orth via llvm-commits
- [compiler-rt] [profile] Change __llvm_profile_counter_bias etc. types to match llvm (PR #102747)
Rainer Orth via llvm-commits
- [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)
Rainer Orth via llvm-commits
- [compiler-rt] [profile] Change __llvm_profile_counter_bias etc. types to match llvm (PR #102747)
Rainer Orth via llvm-commits
- [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)
Rainer Orth via llvm-commits
- [compiler-rt] [ASan][test] Enable ASan tests on SPARC (PR #107405)
Rainer Orth via llvm-commits
- [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)
Rainer Orth via llvm-commits
- [compiler-rt] [WIP][ASan][test] Enable ASan tests on SPARC (PR #107405)
Rainer Orth via llvm-commits
- [compiler-rt] [WIP][ASan][test] Enable ASan tests on SPARC (PR #107405)
Rainer Orth via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] MTM: improve operand latency when missing sched info (PR #101389)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use PatternMatch, IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: use IRBuilder in hoist BO assoc (PR #106978)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM/test: regen a test with UTC (NFC) (PR #107117)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM/test: regen a test with UTC (NFC) (PR #107117)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: extend hoist BO assoc to mul case (PR #106991)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LV: clamp VF with TC only when scalar epilogue is needed (PR #91253)
Ramkumar Ramachandra via llvm-commits
- [llvm] VPlan/Builder: inline VPBuilder::createICmp (NFC) (PR #105650)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
- [llvm] LICM: hoist BO assoc when (C1 op LV) op C2 (PR #106999)
Ramkumar Ramachandra via llvm-commits
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- [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)
Sergey Kozub via llvm-commits
- [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)
Sergey Kozub via llvm-commits
- [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)
Sergey Kozub via llvm-commits
- [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)
Sergey Kozub via llvm-commits
- [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)
Sergey Kozub via llvm-commits
- [llvm] [OpenMPOpt] Initialize OpenMPIRBuilderConfig::IsGPU flag (PR #104456)
Sergio Afonso via llvm-commits
- [llvm] [OpenMPOpt] Initialize OpenMPIRBuilderConfig::IsGPU flag (PR #104456)
Sergio Afonso via llvm-commits
- [llvm] [OpenMPOpt] Initialize OpenMPIRBuilderConfig::IsGPU flag (PR #104456)
Sergio Afonso via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Shafik Yaghmour via llvm-commits
- [llvm] Refine the examples in the debug info document (PR #86272)
Shan Huang via llvm-commits
- [llvm] Refine the examples in the debug info document (PR #86272)
Shan Huang via llvm-commits
- [clang] [lld] [llvm] [X86, lld] Add relocation R_X86_64_REX2_GOTPCRELX (PR #106681)
Shengchen Kan via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
Shengchen Kan via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
Shengchen Kan via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
Shengchen Kan via llvm-commits
- [llvm] [RISCV][TTI] Implement cost for vp min/max intrinsics (PR #107567)
Shih-Po Hung via llvm-commits
- [llvm] [RISCV][TTI] Implement cost for vp min/max intrinsics (PR #107567)
Shih-Po Hung via llvm-commits
- [llvm] [AMDGPU] Mitigate GFX12 VALU read SGPR hazard (PR #100067)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] f32f028 - [NFC] Update check lines of the test case `llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll`
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] cb949b7 - [NFC][FIX] Work around update_test_checks bug
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Still set up `s[6:7]` for COV5 if queue ptr is needed (PR #103490)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Still set up `s[6:7]` for COV5 if queue ptr is needed (PR #103490)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #103490)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Ensure to always translate call site arguments (PR #107323)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Ensure to always translate call site arguments (PR #107323)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Ensure to always translate call site arguments (PR #107323)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
Shilei Tian via llvm-commits
- [llvm] [Attributor][NFC] Pre-commits for #107439 (PR #107457)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Add support for atomic operations in `AAAddressSpace` (PR #106927)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)
Shilei Tian via llvm-commits
- [llvm] [Attributor] Keep track of reached returns in AAPointerInfo (PR #107479)
Shilei Tian via llvm-commits
- [lld] [lld-macho] Always store symbol name length eagerly (NFC) (PR #106906)
Shoaib Meenai via llvm-commits
- [llvm] [CMake] Passthrough variables for packages to subbuilds (PR #107611)
Shoaib Meenai via llvm-commits
- [llvm] [CMake] Passthrough variables for packages to subbuilds (PR #107611)
Shoaib Meenai via llvm-commits
- [llvm] [CMake] Passthrough variables for packages to subbuilds (PR #107611)
Shoaib Meenai via llvm-commits
- [clang] [llvm] [WIP] Add initial support for arc hyperbolic intrinsics (PR #106766)
Simon Pilgrim via llvm-commits
- [llvm] [Analysis] getIntrinsicForCallSite - add vectorization support for acos/asin/atan and cosh/sinh/tanh libcalls (PR #106844)
Simon Pilgrim via llvm-commits
- [llvm] f19dff1 - [X86] scmp/ucmp - add SSE42/AVX2/AVX512 test coverage to show current state of vector legalization/lowering
Simon Pilgrim via llvm-commits
- [llvm] [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (PR #106783)
Simon Pilgrim via llvm-commits
- [llvm] [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (PR #106783)
Simon Pilgrim via llvm-commits
- [llvm] [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (PR #106783)
Simon Pilgrim via llvm-commits
- [llvm] [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (PR #106783)
Simon Pilgrim via llvm-commits
- [llvm] [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (PR #106783)
Simon Pilgrim via llvm-commits
- [llvm] [Analysis] getIntrinsicForCallSite - add vectorization support for acos/asin/atan and cosh/sinh/tanh libcalls (PR #106844)
Simon Pilgrim via llvm-commits
- [llvm] 6c59dfb - [X86] Add test showing failure to remove freeze from all_of pattern
Simon Pilgrim via llvm-commits
- [llvm] 851bacb - [IR] DebugProgramInstruction.cpp - fix GCC Wparentheses warning. NFC.
Simon Pilgrim via llvm-commits
- [llvm] 377045e - [X86] canCreateUndefOrPoisonForTargetNode - X86ISD::CMPP (CMPPS/D) nodes do not generate poison
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Improve the knownbits of CTPOP/LZ/TZ based off the min/max counts of the input value (PR #107085)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Simon Pilgrim via llvm-commits
- [llvm] DAG: Handle lowering unordered compare with inf (PR #100378)
Simon Pilgrim via llvm-commits
- [llvm] [DAGCombine] Propagate truncate to operands (PR #98666)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Improve the knownbits of CTPOP/LZ/TZ based off the min/max counts of the input value (PR #107085)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Shrink width of masked loads/stores (PR #105451)
Simon Pilgrim via llvm-commits
- [llvm] 7afdc6b - [DAG] Fix typo in i64/i128 abdu/abds tests
Simon Pilgrim via llvm-commits
- [llvm] b25b9a7 - [DAG] visitSELECT - add "select usubo(x, y).overflow, (sub y, x), (usubo x, y) -> abdu(x, y)" fold (and neg equivalent)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns [NFC] (PR #107374)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] 1104056 - [X86] preferABDSToABSWithNSW - use ABDS for i32/i64 if we have CMOV
Simon Pilgrim via llvm-commits
- [llvm] DAG: Handle lowering unordered compare with inf (PR #100378)
Simon Pilgrim via llvm-commits
- [llvm] eae1d61 - [X86] Add test coverage for #107289
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns [NFC] (PR #107374)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeInclusiveRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
Simon Pilgrim via llvm-commits
- [llvm] 122874c - [X86] Fold scalar_to_vector(shift(x,imm)) -> vshift(scalar_to_vector(x),imm)
Simon Pilgrim via llvm-commits
- [llvm] 56b2be4 - [X86] Fold scalar_to_vector(funnel(x,y,imm)) -> funnel(scalar_to_vector(x),scalar_to_vector(y),imm)
Simon Pilgrim via llvm-commits
- [llvm] DAG: Lower single infinity is.fpclass tests to fcmp (PR #100380)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] DAG: Lower fcNormal is.fpclass to compare with inf (PR #100389)
Simon Pilgrim via llvm-commits
- [llvm] [X86] For inline memset and memcpy with minsize, use size for alignment, rather than actual alignment (PR #87003)
Simon Pilgrim via llvm-commits
- [llvm] DAG: Lower fcNormal is.fpclass to compare with inf (PR #100389)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Simon Pilgrim via llvm-commits
- [llvm] 6ec889e - [DAG] Add support for neg(abd(x,y)) patterns.
Simon Pilgrim via llvm-commits
- [llvm] 1accedc - [X86] setcc-lowering.ll - add nounwind to remove cfi noise. NFC.
Simon Pilgrim via llvm-commits
- [llvm] c1f78d3 - [X86] LowerSELECTWithCmpZero - add missing description of fold and cleanup zero/allones extension code. NFC.
Simon Pilgrim via llvm-commits
- [llvm] c08f80e - [X86] select.ll - add ADD/SUB identity select test cases
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSELECTWithCmpZero - extend branchless OR/XOR select codegen to handle ADD/SUB as well (PR #107612)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSELECTWithCmpZero - extend branchless OR/XOR select codegen to handle ADD/SUB as well (PR #107612)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerSELECTWithCmpZero - extend branchless OR/XOR select codegen to handle ADD/SUB as well (PR #107612)
Simon Pilgrim via llvm-commits
- [llvm] 1ab649c - [X86] LowerSELECTWithCmpZero - move !canUseCMOV check inside fold and update comment describing fold for clarity. NFC.
Simon Pilgrim via llvm-commits
- [llvm] 3d00e1e - [X86] LowerSELECTWithCmpZero - fold "SELECT (AND(X,1) == 0), 0, -1 -> NEG(AND(X,1))"
Simon Pilgrim via llvm-commits
- [llvm] 058964d - [X86] LowerSELECTWithCmpZero - move "select (X != 0), -1, Y --> 0 - X; or (sbb), Y" fold
Simon Pilgrim via llvm-commits
- [llvm] ffeef75 - [X86] LowerSELECTWithCmpZero - without CMOV, fold "SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2))"
Simon Pilgrim via llvm-commits
- [llvm] 97e6f92 - Fix GCC Wparentheses warning. NFC.
Simon Pilgrim via llvm-commits
- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
Simon Pilgrim via llvm-commits
- [llvm] [MachineOutliner] Preserve instruction bundles (PR #106402)
Simon Tatham via llvm-commits
- [llvm] [MachineOutliner] Preserve instruction bundles (PR #106402)
Simon Tatham via llvm-commits
- [llvm] [MachineOutliner] Preserve instruction bundles (PR #106402)
Simon Tatham via llvm-commits
- [llvm] [AArch64] Combine zext of deinterleaving shuffle. (PR #107201)
Sjoerd Meijer via llvm-commits
- [llvm] Allow optimization of __size_returning_new variants. (PR #102258)
Snehasish Kumar via llvm-commits
- [llvm] [SandboxIR] Implement remaining ConstantInt functions (PR #106775)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement remaining ConstantInt functions (PR #106775)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregate (PR #107136)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregate (PR #107136)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregateZero (PR #107172)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregateZero (PR #107172)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement ConstantPointerNull (PR #107320)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement ConstantPointerNull (PR #107320)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement PoisonValue (PR #107324)
Sriraman Tallam via llvm-commits
- [llvm] [SandboxIR] Implement PoisonValue (PR #107324)
Sriraman Tallam via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add image_atomic_fmin/fmax as aliases for GFX12 (PR #107242)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add image_atomic_fmin/fmax as aliases for GFX12 (PR #107242)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [llvm-jitlink] Explicit exports for builtin runtime functions in MinGW executables (PR #107375)
Stefan Gränitz via llvm-commits
- [llvm] [llvm-jitlink] Explicit exports for builtin runtime functions in MinGW executables (PR #107375)
Stefan Gränitz via llvm-commits
- [llvm] [llvm-jitlink] Explicit exports for builtin runtime functions in MinGW executables (PR #107375)
Stefan Gränitz via llvm-commits
- [llvm] [llvm-jitlink] Explicit exports for builtin runtime functions in MinGW executables (PR #107375)
Stefan Gränitz via llvm-commits
- [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)
Stella Laurenzo via llvm-commits
- [llvm] [DLCov 1/5] Add CMake option to enable enhanced line number coverage tracking (PR #107278)
Stephen Tozer via llvm-commits
- [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)
Stephen Tozer via llvm-commits
- [llvm] [DLCov 1/5] Add CMake option to enable enhanced line number coverage tracking (PR #107278)
Stephen Tozer via llvm-commits
- [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)
Stephen Tozer via llvm-commits
- [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)
Stephen Tozer via llvm-commits
- [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)
Stephen Tozer via llvm-commits
- [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)
Stephen Tozer via llvm-commits
- [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
Steven Perron via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
Sushant Gokhale via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
Sushant Gokhale via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
Sushant Gokhale via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
Sushant Gokhale via llvm-commits
- [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)
Sushant Gokhale via llvm-commits
- [llvm] [LV] Check for vector-to-scalar casts in legalizer (PR #106244)
Sven van Haastregt via llvm-commits
- [llvm] [LV] Check for vector-to-scalar casts in legalizer (PR #106244)
Sven van Haastregt via llvm-commits
- [llvm] [ThinLTO] Don't always print ModulesToCompile debugging information (PR #106769)
Teresa Johnson via llvm-commits
- [llvm] [ThinLTO] Don't always print ModulesToCompile debugging information (PR #106769)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Add Inlining support (PR #106154)
Teresa Johnson via llvm-commits
- [llvm] [Analysis] Update getPromotionCandidatesForInstruction description (NFC) (PR #107277)
Teresa Johnson via llvm-commits
- [llvm] [Analysis] Update getPromotionCandidatesForInstruction description (NFC) (PR #107277)
Teresa Johnson via llvm-commits
- [llvm] [ThinLTO] Shrink GlobalValueSummary by 8 bytes (PR #107342)
Teresa Johnson via llvm-commits
- [lld] [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (PR #106670)
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- [llvm] [ThinLTO] Shrink GlobalValueSummary by 8 bytes (PR #107342)
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- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
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- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
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- [lld] [llvm] [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (PR #106193)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Teresa Johnson via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Remove unnecessary data structure (NFC) (PR #107643)
Teresa Johnson via llvm-commits
- [llvm] [LTO] Modernize AliasSummary and ModuleSummaryIndex (NFC) (PR #107633)
Teresa Johnson via llvm-commits
- [llvm] [ThinLTO] Shrink FunctionSummary by 8 bytes (PR #107706)
Teresa Johnson via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
Thomas Fransham via llvm-commits
- [llvm] [LLVM]Fix symbol visibility macros not being define for AIX (PR #107705)
Thomas Fransham via llvm-commits
- [llvm] [LLVM]Fix symbol visibility macros not being define for AIX (PR #107705)
Thomas Fransham via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
Thorsten Schütt via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
Thorsten Schütt via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
Thorsten Schütt via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Thorsten Schütt via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Thorsten Schütt via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Thorsten Schütt via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Thorsten Schütt via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Thorsten Schütt via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Thorsten Schütt via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Thorsten Schütt via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Thorsten Schütt via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Implement Pass class (PR #107617)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Implement Pass class (PR #107617)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Implement Pass class (PR #107617)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Implement Pass class (PR #107617)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Implement Pass class (PR #107617)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Implement Pass class (PR #107617)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxVec] Implement Pass class (PR #107617)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Visit ICmp (PR #105991)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
Thorsten Schütt via llvm-commits
- [llvm] DXIL: Use correct type ID when writing ValueAsMetadata. (PR #94337)
Tim Besard via llvm-commits
- [llvm] DXIL: Use correct type ID when writing ValueAsMetadata. (PR #94337)
Tim Besard via llvm-commits
- [llvm] [DXIL] Add sign intrinsic part 2 (PR #101988)
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- [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)
Tim Gymnich via llvm-commits
- [llvm] [DXIL] Add sign intrinsic part 2 (PR #101988)
Tim Gymnich via llvm-commits
- [llvm] workflows/release-binaries: Fix automatic upload (PR #107315)
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- [llvm] [hurd] Fix accessing f_type field of statvfs (PR #71851)
Tobias Hieta via llvm-commits
- [llvm] [hurd] Fix accessing f_type field of statvfs (PR #71851)
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- [clang] [libclc] [llvm] [libclc] More cross compilation fixes (PR #97811)
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Tom Stellard via llvm-commits
- [llvm] workflows: Fix tag name for release sources job (PR #100752)
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- [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)
Tom Stellard via llvm-commits
- [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)
Tom Stellard via llvm-commits
- [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)
Tom Stellard via llvm-commits
- [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)
Tom Stellard via llvm-commits
- [llvm] workflows/release-binaries: Fix automatic upload (PR #107315)
Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Tom Stellard via llvm-commits
- [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)
Tom Stellard via llvm-commits
- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
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- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
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- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
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- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
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- [llvm] [TableGen] Add PrintError family overload that take a print function (PR #107333)
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- [llvm] Avoid exposing unknown git repositories (PR #105220)
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- [llvm] Avoid exposing password and token from git repositories (PR #105220)
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- [llvm] Avoid exposing password and token from git repositories (PR #105220)
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- [llvm] Avoid exposing password and token from git repositories (PR #105220)
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- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] Improve debugging and minor refactoring (PR #104642)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] Improve debugging and minor refactoring (PR #104642)
Tyler Nowicki via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] Move the SuspendCrossingInfo analysis helper into its own header/source (PR #106306)
Tyler Nowicki via llvm-commits
- [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)
Udit Agarwal via llvm-commits
- [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)
Udit Agarwal via llvm-commits
- [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)
Udit Agarwal via llvm-commits
- [llvm] [llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (PR #107038)
Ulrich Weigand via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
Ulrich Weigand via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
Ulrich Weigand via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
Ulrich Weigand via llvm-commits
- [llvm] [llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (PR #107038)
Ulrich Weigand via llvm-commits
- [llvm] [X86] Prefer `lock or` over mfence (PR #106555)
Valentin Churavy via llvm-commits
- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
Valery Pykhtin via llvm-commits
- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
Valery Pykhtin via llvm-commits
- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
Valery Pykhtin via llvm-commits
- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
Valery Pykhtin via llvm-commits
- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
Valery Pykhtin via llvm-commits
- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
Valery Pykhtin via llvm-commits
- [llvm] b30880e - [SandboxIR] Fix linking error caused by 840da2e8ba7e0f77938adfc6f6d315137542a1b8
Vasileios Porpodas via llvm-commits
- [llvm] 7ea9f0d - [SandboxVec][NFC] Remove unused header files
Vasileios Porpodas via llvm-commits
- [libcxx] [libcxxabi] [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Vedant Tewari via llvm-commits
- [llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Vikram Hegde via llvm-commits
- [llvm] Reland "AtomicExpand: Allow incrementally legalizing atomicrmw" (PR #107309)
Vitaly Buka via llvm-commits
- [llvm] DONT_MERGE: Reland "AtomicExpand: Allow incrementally legalizing atomicrmw" (PR #107309)
Vitaly Buka via llvm-commits
- [llvm] AtomicExpand: Allow incrementally legalizing atomicrmw (PR #103371)
Vitaly Buka via llvm-commits
- [compiler-rt] [scudo] Use variable instead of recomputing. (PR #106647)
Vitaly Buka via llvm-commits
- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl (PR #107313)
Vitaly Buka via llvm-commits
- [compiler-rt] 1254259 - [hwasan] Disable test with hwasan-aliasing
Vitaly Buka via llvm-commits
- [compiler-rt] 96a5aab - [NFC][sanitizer] Thread safety annotation for Symbolizer
Vitaly Buka via llvm-commits
- [clang] [compiler-rt] [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (PR #106736)
Vitaly Buka via llvm-commits
- [clang] [compiler-rt] [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (PR #106736)
Vitaly Buka via llvm-commits
- [clang] [compiler-rt] [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (PR #106736)
Vitaly Buka via llvm-commits
- [clang] [compiler-rt] [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (PR #106736)
Vitaly Buka via llvm-commits
- [clang] [compiler-rt] [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (PR #106736)
Vitaly Buka via llvm-commits
- [clang] [compiler-rt] [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (PR #106736)
Vitaly Buka via llvm-commits
- [llvm] [Instrumentation] Mark instrumented calls as implicit (PR #106447)
Vitaly Buka via llvm-commits
- [compiler-rt] [compiler-rt][ASan] Add function copying annotations (PR #91702)
Vitaly Buka via llvm-commits
- [compiler-rt] [compiler-rt][ASan] Add function copying annotations (PR #91702)
Vitaly Buka via llvm-commits
- [compiler-rt] [compiler-rt][ASan] Add function copying annotations (PR #91702)
Vitaly Buka via llvm-commits
- [compiler-rt] [compiler-rt][ASan] Add function copying annotations (PR #91702)
Vitaly Buka via llvm-commits
- [compiler-rt] [compiler-rt][ASan] Add function copying annotations (PR #91702)
Vitaly Buka via llvm-commits
- [llvm] [Sanitizer] Extend DiagnosticInfo for IR Instrumentation reporting. (PR #106356)
Vitaly Buka via llvm-commits
- [compiler-rt] [WIP][ASan][test] Enable ASan tests on SPARC (PR #107405)
Vitaly Buka via llvm-commits
- [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)
Vitaly Buka via llvm-commits
- [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)
Vitaly Buka via llvm-commits
- [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)
Vitaly Buka via llvm-commits
- [compiler-rt] 086ee76 - [sanitizer] Remove "null" for 256 allocations in test
Vitaly Buka via llvm-commits
- [compiler-rt] 62ae012 - [asan] Try to deflake the test
Vitaly Buka via llvm-commits
- [compiler-rt] 3a13c5a - [tsan] Disable tests flaky on PPC with COMPILER_RT_DEBUG
Vitaly Buka via llvm-commits
- [compiler-rt] 6b67f79 - [lsan] Deflake test on aarch64
Vitaly Buka via llvm-commits
- [llvm] [RISCV] Added new register class GPRNoGPRS defined as substraction of GPRC sequences from GPR (PR #106974)
Vladislav Belov via llvm-commits
- [llvm] [RISCV] Added new register class GPRNoGPRS defined as substraction of GPRC sequences from GPR (PR #106974)
Vladislav Belov via llvm-commits
- [llvm] [RISCV] Added new register class GPRNoGPRS defined as substraction of GPRC sequences from GPR (PR #106974)
Vladislav Belov via llvm-commits
- [clang] [llvm] Fix build errors with a `LLVM_ENABLE_MODULES=ON` build (PR #107654)
Volodymyr Sapsai via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)
Volodymyr Vasylkun via llvm-commits
- [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)
Volodymyr Vasylkun via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [llvm]Add a simple Telemetry framework (PR #102323)
Vy Nguyen via llvm-commits
- [llvm] [SPIR-V][NFC] More efficient getPaddedLen (PR #105823)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Add definitions and fix implementation for atomic builtins (PR #106107)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Add definitions and fix implementation for atomic builtins (PR #106107)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Improve correctness of emitted MIR between passes for branching instructions (PR #106966)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Improve correctness of emitted MIR between passes for branching instructions (PR #106966)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Ensure that OpExtInst instructions generated by NonSemantic_Shader_DebugInfo_100 are not mixed up with other OpExtInst instructions (PR #107007)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Ensure that OpExtInst instructions generated by NonSemantic_Shader_DebugInfo_100 are not mixed up with other OpExtInst instructions (PR #107007)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Improve correctness of emitted MIR between passes for branching instructions (PR #106966)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Ensure that OpExtInst instructions generated by NonSemantic_Shader_DebugInfo_100 are not mixed up with other OpExtInst instructions (PR #107007)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)
Vyacheslav Levytskyy via llvm-commits
- [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)
Vyacheslav Levytskyy via llvm-commits
- [clang] [llvm] Introduce -defer-thinlto-prelink-coro-split that skips Coro passes in ThinLTO pre-link pipeline (PR #107153)
Wei Wang via llvm-commits
- [clang] [llvm] Introduce -defer-thinlto-prelink-coro-split that skips Coro passes in ThinLTO pre-link pipeline (PR #107153)
Wei Wang via llvm-commits
- [clang] [llvm] Introduce -defer-thinlto-prelink-coro-split that skips Coro passes in ThinLTO pre-link pipeline (PR #107153)
Wei Wang via llvm-commits
- [llvm] [CodeGen] Use maps to cache lookups in MachineConstantPool::getConstantPoolIndex (PR #107135)
Weihang Fan via llvm-commits
- [llvm] [CodeGen] Use maps to cache lookups in MachineConstantPool::getConstantPoolIndex (PR #107135)
Weihang Fan via llvm-commits
- [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)
William Junda Huang via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)
Xiang Li via llvm-commits
- [llvm] [DirectX] Clean up trailing whitespace. NFC (PR #107335)
Xiang Li via llvm-commits
- [llvm] [DirectX] Fix crash in DXILOpBuilder for vector types (PR #107334)
Xiang Li via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
Xiang Li via llvm-commits
- [llvm] [DirectX] generate resource table for PSV part (PR #106607)
Xiang Li via llvm-commits
- [llvm] [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (PR #107427)
Xiang Li via llvm-commits
- [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)
YANG Xudong via llvm-commits
- [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)
YANG Xudong via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Yaxun Liu via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Yaxun Liu via llvm-commits
- [llvm] [AMDGPU] Fix SDWA commuting (PR #106920)
Yaxun Liu via llvm-commits
- [llvm] [SLP] Add vectorization support for [u|s]cmp (PR #106747)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Correct the scheduler class for FCVT_S_BF16. (PR #107028)
Yingwei Zheng via llvm-commits
- [llvm] [SLP] Don't create zero-count items in SameValuesCounter (PR #107042)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Custom legalize f16/bf16 FCOPYSIGN with Zfhmin/Zbfmin. (PR #107039)
Yingwei Zheng via llvm-commits
- [clang] [llvm] [ValueLattice][SCCP] Do not track undefs (PR #107105)
Yingwei Zheng via llvm-commits
- [llvm] [SLP] Don't create zero-count items in SameValuesCounter (PR #107042)
Yingwei Zheng via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
Yingwei Zheng via llvm-commits
- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
Yingwei Zheng via llvm-commits
- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
Yingwei Zheng via llvm-commits
- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
Yingwei Zheng via llvm-commits
- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
Yingwei Zheng via llvm-commits
- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Yingwei Zheng via llvm-commits
- [clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][MachineCombiner] Combine `fadd X, (fneg Y)` to `fsub X, Y` (PR #107803)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][MachineCombiner] Combine `fadd X, (fneg Y)` to `fsub X, Y` (PR #107803)
Yingwei Zheng via llvm-commits
- [llvm] SelectionDAG: Use qNaN constant if FCANONICALIZE not LegalOrCustom (PR #104564)
YunQiang Su via llvm-commits
- [llvm] SelectionDAG: Use qNaN constant if FCANONICALIZE not LegalOrCustom (PR #104564)
YunQiang Su via llvm-commits
- [llvm] [MIPS] Fix error messages when rejecting certain assembly… (PR #94695)
YunQiang Su via llvm-commits
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- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
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- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
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- [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
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- [clang] [llvm] [Clang] C++20 Coroutines: Introduce Frontend Attribute [[clang::coro_await_elidable]] (PR #99282)
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- [llvm] [RISCV] Rename `vcix_state` register to `sf_vcix_state` (PR #106995)
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- [llvm] [Transforms][IPO] Add func suffix in ArgumentPromotion and DeadArgume… (PR #105742)
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- [lld] ecc9aec - [LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (#106904)
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- [compiler-rt] [compiler-rt][rtsan] Record pc and bp higher up in the stack (PR #107014)
via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] Record pc and bp higher up in the stack (PR #107014)
via llvm-commits
- [clang] [compiler-rt] [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (PR #106736)
via llvm-commits
- [clang] [compiler-rt] [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (PR #106736)
via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
via llvm-commits
- [llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)
via llvm-commits
- [llvm] [Offload] Change x86_64-pc-linux to x86_64-unknown-linux (PR #107023)
via llvm-commits
- [llvm] 0ba006d - [MIPS] Fix error messages when rejecting certain assembly not supported by ISA (#94695)
via llvm-commits
- [llvm] [MIPS] Fix error messages when rejecting certain assembly not supported by ISA (PR #94695)
via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (PR #107026)
via llvm-commits
- [llvm] [RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (PR #107026)
via llvm-commits
- [llvm] 366ac8c - [LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (#106783)
via llvm-commits
- [llvm] [RISCV] Correct the scheduler class for FCVT_S_BF16. (PR #107028)
via llvm-commits
- [clang] [llvm] [BPF] Make -mcpu=v3 as the default (PR #107008)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
via llvm-commits
- [llvm] [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (PR #107032)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] ba3c1ed - [RISCV] Correct the scheduler class for FCVT_S_BF16. (#107028)
via llvm-commits
- [llvm] 9a1d14a - [LTO] Don't make unnecessary copies of ImportIDTable (#106998)
via llvm-commits
- [llvm] [llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (PR #107038)
via llvm-commits
- [llvm] [llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (PR #107038)
via llvm-commits
- [llvm] [RISCV] Custom legalize f16/bf16 FCOPYSIGN with Zfhmin/Zbfmin. (PR #107039)
via llvm-commits
- [clang] [flang] [llvm] [mlir] [ADT] Deprecate DenseMap::getOrInsertDefault (PR #107040)
via llvm-commits
- [clang] [flang] [llvm] [mlir] [ADT] Deprecate DenseMap::getOrInsertDefault (PR #107040)
via llvm-commits
- [llvm] [SLP] Don't create zero-count items in SameValuesCounter (PR #107042)
via llvm-commits
- [clang] [llvm] [BPF] Make -mcpu=v3 as the default (PR #107008)
via llvm-commits
- [clang] [llvm] [BPF] Make -mcpu=v3 as the default (PR #107008)
via llvm-commits
- [llvm] [PowerPC] Use DenseMap::operator[] (NFC) (PR #107044)
via llvm-commits
- [llvm] 9a1eded - [RISCV] Custom legalize f16/bf16 FCOPYSIGN with Zfhmin/Zbfmin. (#107039)
via llvm-commits
- [llvm] [AMDGPU][NewPM] Have consistent property changes in GCNDPPCombine (PR #106520)
via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
via llvm-commits
- [llvm] 0421049 - [AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (#106967)
via llvm-commits
- [llvm] 8e5b43c - [AMDGPU][NewPM] Have consistent property changes in GCNDPPCombine (#106520)
via llvm-commits
- [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)
via llvm-commits
- [clang] [llvm] [BPF] Make -mcpu=v3 as the default (PR #107008)
via llvm-commits
- [llvm] 00c198b - [MachinePipeliner] Make Recurrence MII More Accurate (#105475)
via llvm-commits
- [llvm] [MachinePipeliner] Make Recurrence MII More Accurate (PR #105475)
via llvm-commits
- [flang] [llvm] [mlir] [OpenMPIRBuilder] Don't drop debug info for target region. (PR #80692)
via llvm-commits
- [flang] [llvm] [mlir] [OpenMPIRBuilder] Don't drop debug info for target region. (PR #80692)
via llvm-commits
- [flang] [llvm] [mlir] [OpenMPIRBuilder] Don't drop debug info for target region. (PR #80692)
via llvm-commits
- [llvm] 7e6bad1 - [RISCV] Rename `vcix_state` register to `sf_vcix_state`. NFC (#106995)
via llvm-commits
- [compiler-rt] af5c18a - [compiler-rt] [docs] Mention Windows as one of the supported OSes (#106874)
via llvm-commits
- [llvm] [mlir] eliminating g++ warnings (PR #105520)
via llvm-commits
- [clang] [llvm] Support for assume directive : Parse & AST modules (PR #97535)
via llvm-commits
- [clang] [llvm] Support for assume directive : Parse & AST modules (PR #97535)
via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] Record pc and bp higher up in the stack (PR #107014)
via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] Record pc and bp higher up in the stack (PR #107014)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
via llvm-commits
- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
via llvm-commits
- [llvm] 6c8746b - [Analysis] getIntrinsicForCallSite - add vectorization support for acos/asin/atan and cosh/sinh/tanh libcalls (#106844)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize 128-bit types for FABS (PR #104753)
via llvm-commits
- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
via llvm-commits
- [llvm] [AVR] Reformat MC tests (PR #107068)
via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
via llvm-commits
- [llvm] c3d8124 - [Utils][SPIR-V] Adding spirv-sim to LLVM (#104020)
via llvm-commits
- [llvm] d24a2fd - [AMDGPU] Create dir for amdgpu specific machineverifier tests (#106960)
via llvm-commits
- [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)
via llvm-commits
- [llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)
via llvm-commits
- [llvm] [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (PR #107079)
via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
via llvm-commits
- [llvm] 8861328 - Revert "[Utils][SPIR-V] Adding spirv-sim to LLVM" (#107084)
via llvm-commits
- [libcxx] [llvm] [libcxx] [ci] Add a test configuration with an incomplete sysroot (PR #107089)
via llvm-commits
- [llvm] [AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107091)
via llvm-commits
- [llvm] [AMDGPU][LDS] Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (PR #107092)
via llvm-commits
- [llvm] 0748f42 - [AArch64][GlobalISel] Legalize 128-bit types for FABS (#104753)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize 128-bit types for FABS (PR #104753)
via llvm-commits
- [compiler-rt] 70a19ad - [profile] Change __llvm_profile_counter_bias etc. types to match llvm (#102747)
via llvm-commits
- [compiler-rt] [profile] Change __llvm_profile_counter_bias etc. types to match llvm (PR #102747)
via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
via llvm-commits
- [llvm] [mlir] [nvvm] Include `llvm-optimize-for-nvvm-target` pass in `gpu-lower-to-nvvm-pipeline` (PR #107102)
via llvm-commits
- [llvm] [mlir] [nvvm] Include `llvm-optimize-for-nvvm-target` pass in `gpu-lower-to-nvvm-pipeline` (PR #107102)
via llvm-commits
- [llvm] [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (PR #107101)
via llvm-commits
- [clang] [llvm] [ValueLattice][SCCP] Do not track undefs (PR #107105)
via llvm-commits
- [llvm] ce8ec31 - [SLP][REVEC] Support more mask pattern usage in shufflevector. (#106212)
via llvm-commits
- [llvm] [llvm][Docs] Update guide to include ``pip install lit`` (PR #106526)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [compiler-rt] a424b79 - [compiler-rt][rtsan] Record pc and bp higher up in the stack (#107014)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [AMDGPU] Improve codegen for GFX10+ DPP reductions and scans (PR #107108)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] 7852ebc - [BPF] Make -mcpu=v3 as the default (#107008)
via llvm-commits
- [clang] [llvm] [BPF] Make -mcpu=v3 as the default (PR #107008)
via llvm-commits
- [llvm] [RISCV] Rename sf_vcix_state to sf.vcix_state. NFC (PR #107115)
via llvm-commits
- [llvm] df159d3 - [GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (#106702)
via llvm-commits
- [llvm] [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (PR #107100)
via llvm-commits
- [llvm] 05f5a91 - LICM: use IRBuilder in hoist BO assoc (#106978)
via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] LICM/test: regen a test with UTC (NFC) (PR #107117)
via llvm-commits
- [llvm] fedc755 - [ThinLTO] Don't always print ModulesToCompile debugging information (#106769)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
via llvm-commits
- [llvm] 3b6e255 - LICM/test: regen a test with UTC (NFC) (#107117)
via llvm-commits
- [llvm] b7017ef - [RISCV] Rename sf_vcix_state to sf.vcix_state. NFC (#107115)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
via llvm-commits
- [clang] [llvm] [AARCH64][SVE] Add intrinsics for SVE LUTI instructions (PR #97058)
via llvm-commits
- [clang] [llvm] [AArch64][NEON] Add intrinsics for LUTI (PR #96883)
via llvm-commits
- [llvm] 2a9f93b - [RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (#106948)
via llvm-commits
- [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)
via llvm-commits
- [llvm] 59a3b41 - [ADT] Deprecate DenseMap::getOrInsertDefault (#107040)
via llvm-commits
- [llvm] [MC] Add .loc_label instruction (PR #99710)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] 903d1c6 - [libclc] More cross compilation fixes (#97811)
via llvm-commits
- [llvm] [NFC][opt] Rename VerifierKind enums (PR #106789)
via llvm-commits
- [llvm] f1ef67d - LICM: extend hoist BO assoc to mul case (#106991)
via llvm-commits
- [llvm] 4da0aa3 - [gn build] Add missing llvm-strings dependency to check-lld (#106896)
via llvm-commits
- [llvm] 2c7786e - Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (#106770)
via llvm-commits
- [llvm] [SLPVectorizer] Use DenseMap::operator[] (NFC) (PR #107123)
via llvm-commits
- [llvm] [InstCombine] Generalize and consolidate phi translation check (PR #106051)
via llvm-commits
- [llvm] [InstCombine] Generalize and consolidate phi translation check (PR #106051)
via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
via llvm-commits
- [llvm] [KnownBits] Add KnownBits::makeConstantRange to determine the known bits from a pair of unsigned lo/hi bound values (PR #107080)
via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
via llvm-commits
- [llvm] [SandboxIR] Add tracking for ShuffleVectorInst::commute. (PR #106644)
via llvm-commits
- [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)
via llvm-commits
- [llvm] ebdadcf - [SPIR-V] Improve correctness of emitted MIR between passes for branching instructions (#106966)
via llvm-commits
- [llvm] 4f403e8 - [SPIR-V] Ensure that OpExtInst instructions generated by NonSemantic_Shader_DebugInfo_100 are not mixed up with other OpExtInst instructions (#107007)
via llvm-commits
- [llvm] e89bcfc - [SandboxIR] Add tracking for ShuffleVectorInst::commute. (#106644)
via llvm-commits
- [llvm] fdc1b5d - [NFC][opt] Rename VerifierKind enums (#106789)
via llvm-commits
- [compiler-rt] 26a4edf - [CMake][compiler-rt] Support for using compiler-rt atomic library (#106603)
via llvm-commits
- [llvm] b91b1f0 - [SandboxIR] Implement remaining ConstantInt functions (#106775)
via llvm-commits
- [llvm] [SandboxIR] Implement remaining ConstantInt functions (PR #106775)
via llvm-commits
- [clang] [llvm] [PGO][Pipeline] Enable PGOForceFunctionAttrs in PGO optimization pipelines (PR #106790)
via llvm-commits
- [llvm] fb14f1d - [PGO][Pipeline] Enable PGOForceFunctionAttrs in PGO optimization pipelines (#106790)
via llvm-commits
- [llvm] workflows: Fix tag name for release sources job (PR #100752)
via llvm-commits
- [clang] [llvm] [AMDGPU] Add target intrinsic for s_prefetch_data (PR #107133)
via llvm-commits
- [llvm] [X86] Shrink width of masked loads/stores (PR #105451)
via llvm-commits
- [llvm] 24b6b82 - [NFC] Add llvm_unreachable to getRCPrefix (#106822)
via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregate (PR #107136)
via llvm-commits
- [llvm] [RISCV] Don't promote f16/bf16 SELECT with Zfhmin/Zfbfmin. (PR #107138)
via llvm-commits
- [llvm] 126940b - [SLPVectorizer] Use DenseMap::{find,try_emplace} (NFC) (#107123)
via llvm-commits
- [llvm] [LV] Prefer FLT_MIN/MAX for fmin/fmax reductions with ninf (PR #107141)
via llvm-commits
- [llvm] [X86] Don't save/restore fp/bp around terminator (PR #106462)
via llvm-commits
- [llvm] [SLPVectorizer] Avoid two successive hash lookups on the same key (PR #107143)
via llvm-commits
- [llvm] 1fbb6b4 - [LV] Prefer FLT_MIN/MAX for fmin/fmax reductions with ninf (#107141)
via llvm-commits
- [llvm] 451a313 - [DominanceFrontier] Remove unused functions (#106913)
via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregate (PR #107136)
via llvm-commits
- [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)
via llvm-commits
- [llvm] ec8e1c6 - [RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (#107026)
via llvm-commits
- [compiler-rt] [llvm] [NFC] Rename the `Nr` abbreviation to `Num` (PR #107151)
via llvm-commits
- [llvm] cdab6ff - [X86] Don't save/restore fp/bp around terminator (#106462)
via llvm-commits
- [llvm] [X86] Don't save/restore fp/bp around terminator (PR #106462)
via llvm-commits
- [clang] [llvm] Introduce -defer-thinlto-prelink-coro-split that skips Coro passes in ThinLTO pre-link pipeline (PR #107153)
via llvm-commits
- [compiler-rt] [scudo] Update secondary cache released pages bound. (PR #106466)
via llvm-commits
- [compiler-rt] 0ef7b1d - [scudo] Update secondary cache released pages bound. (#106466)
via llvm-commits
- [compiler-rt] [scudo] Update secondary cache released pages bound. (PR #106466)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [APFloat] Fix literals with long significands. (PR #102051)
via llvm-commits
- [llvm] [APFloat] Fix literals with long significands. (PR #102051)
via llvm-commits
- [llvm] [APFloat] Fix literals with long significands. (PR #102051)
via llvm-commits
- [llvm] [APFloat] Fix literals with long significands. (PR #102051)
via llvm-commits
- [llvm] Bail out jump threading on indirect branches (PR #103688)
via llvm-commits
- [llvm] Bail out jump threading on indirect branches (PR #103688)
via llvm-commits
- [llvm] 53d3d1a - [SLPVectorizer] Avoid two successive hash lookups on the same key (#107143)
via llvm-commits
- [llvm] [ThinLTO] Avoid repeated std::map lookups (NFC) (PR #107156)
via llvm-commits
- [llvm] [WebAssembly] Remove Kind argument from WebAssemblyOperand (NFC) (PR #107157)
via llvm-commits
- [llvm] [llvm/llvm-project][Coroutines] ABI Object (PR #106306)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] db3792b - [RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (#107011)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [lld] [LLD][COFF][NFC] Store impSym as DefinedImportData in ImportFile. (PR #107162)
via llvm-commits
- [lld] [LLD][COFF] Initial support for ARM64EC importlibs. (PR #107164)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [IR] Remove unused MINARITY operand trait tpl args, NFC (PR #107165)
via llvm-commits
- [llvm] [IR] Remove unused MINARITY operand trait tpl args, NFC (PR #107165)
via llvm-commits
- [llvm] d3c10b5 - [M68k] Introduce more MOVI cases (#98377)
via llvm-commits
- [llvm] 1c874bb - [RISCV] Don't promote f16/bf16 SELECT with Zfhmin/Zfbfmin. (#107138)
via llvm-commits
- [lld] b24a304 - [lld-macho] Always store symbol name length eagerly (NFC) (#106906)
via llvm-commits
- [llvm] 3209766 - [ctx_prof] Add Inlining support (#106154)
via llvm-commits
- [llvm] [WebAssembly] Rename legacy EH tests (PR #107166)
via llvm-commits
- [compiler-rt] 18263c3 - [compiler-rt][rtsan] Add scoped reporting lock (#107167)
via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] Add scoped reporting lock (PR #107167)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregate (PR #107136)
via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregate (PR #107136)
via llvm-commits
- [llvm] 83ad644 - [X86][AVX10.2] Support AVX10.2-BF16 new instructions. (#101603)
via llvm-commits
- [llvm] 814aa43 - [SandboxIR] Implement ConstantAggregate (#107136)
via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregate (PR #107136)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [llvm] ff0f201 - [RISCV] Bitcast fixed length bf16/f16 build_vector to i16 with Zvfbfmin/Zvfhmin+Zfbfmin/Zfhmin. (#106637)
via llvm-commits
- [llvm] f1615e3 - [WebAssembly] Remove Kind argument from WebAssemblyOperand (NFC) (#107157)
via llvm-commits
- [llvm] [SandboxIR] Implement ConstantAggregateZero (PR #107172)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [compiler-rt] [llvm] [compiler-rt][rtsan] Introduce RTSAN_OPTIONS and flags (PR #107174)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [llvm] b057e16 - [IR] Remove unused MINARITY operand trait tpl args, NFC (#107165)
via llvm-commits
- [llvm] ed220e1 - [VPlan][NFC] Implement `VPWidenMemoryRecipe::computeCost()`. (#105614)
via llvm-commits
- [llvm] 9b5971a - [AArch64][GlobalISel] Lower G_BUILD_VECTOR to G_INSERT_VECTOR_ELT (#105686)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Lower G_BUILD_VECTOR to G_INSERT_VECTOR_ELT (PR #105686)
via llvm-commits
- [llvm] [llvm][CodeGen] Resolve issues when updating live intervals in window scheduler (PR #101945)
via llvm-commits
- [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)
via llvm-commits
- [llvm] 9a17a60 - [PowerPC] Use DenseMap::operator[] (NFC) (#107044)
via llvm-commits
- [llvm] [XRay] Use DenseMap::{operator[], try_emplace} (NFC) (PR #107178)
via llvm-commits
- [llvm] 8662714 - [AMDGPU] Mitigate GFX12 VALU read SGPR hazard (#100067)
via llvm-commits
- [llvm] 0ad6cee - [RISCV] Fix missing `i64` to `double` tests in the cast.ll. (NFC) (#106972)
via llvm-commits
- [llvm] [SimplifyCFG] Use range-based for loops (NFC) (PR #107180)
via llvm-commits
- [llvm] 8b28e2e - [WebAssembly] Rename legacy EH tests (#107166)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] 6c607cf - [RISCV] Preserve tail agnostic policy in foldVMV_V_V (#105788)
via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
via llvm-commits
- [llvm] [WebAssembly] Misc. fixes in CFGStackify (PR #107182)
via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
via llvm-commits
- [llvm] 3e79847 - [LegalizeDAG][RISCV] Don't promote f16 vector ISD::FNEG/FABS/FCOPYSIGN to f32 when we don't have Zvfh. (#106652)
via llvm-commits
- [llvm] 41402c6 - [RISCV][GISel] Use CCValAssign::getCustomReg for converting f16/f32<->GPR. (#105700)
via llvm-commits
- [llvm] [LLD] Avoid non-deterministic relocations processing. (PR #107186)
via llvm-commits
- [llvm] [NFC][Coverage] Do not use recursion for GCOV propagateCounts. (PR #68455)
via llvm-commits
- [llvm] [NFC][Coverage] Do not use recursion for GCOV propagateCounts. (PR #68455)
via llvm-commits
- [llvm] [WebAssembly] Rename legacy EH mir tests (PR #107189)
via llvm-commits
- [llvm] 0628683 - Reland "Revert "AtomicExpand: Allow incrementally legalizing atomicrmw"" (#106793)
via llvm-commits
- [llvm] [BasicBlockUtils] Fix SplitBlockPredecessors incorrect dominator insert (PR #107190)
via llvm-commits
- [llvm] 427e202 - [APInt] improve initialization performance (#106945)
via llvm-commits
- [llvm] [APInt] improve initialization performance (PR #106945)
via llvm-commits
- [llvm] [RISCV] Remove pre-assignment of mask vectors during call lowering. (PR #107192)
via llvm-commits
- [llvm] [RISCV] Remove pre-assignment of mask vectors during call lowering. (PR #107192)
via llvm-commits
- [llvm] de37da8 - [MachineOutliner] Preserve instruction bundles (#106402)
via llvm-commits
- [llvm] 771b7af - Reapply "[llvm/DWARF] Recursively resolve DW_AT_signature references"… (#99495)
via llvm-commits
- [llvm] 009184f - [ThinLTO] Avoid repeated std::map lookups (NFC) (#107156)
via llvm-commits
- [llvm] 8bfd6b9 - [SSAUpdater] Use DenseMap::operator[] (NFC) (#107179)
via llvm-commits
- [llvm] e99eb89 - [SimplifyCFG] Use range-based for loops (NFC) (#107180)
via llvm-commits
- [llvm] [AArch64] Combine zext of deinterleaving shuffle. (PR #107201)
via llvm-commits
- [llvm] 58f2896 - [XRay] Use DenseMap::{operator[], try_emplace} (NFC) (#107178)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
via llvm-commits
- [llvm] 9e08db7 - [OpenMPIRBuilder] Don't drop debug info for target region. (#80692)
via llvm-commits
- [llvm] 5914566 - [Utils][SPIR-V] Adding spirv-sim to LLVM (#107094)
via llvm-commits
- [llvm] afb6daf - [clang][HLSL] Add WaveIsFirstLane() intrinsic (#103299)
via llvm-commits
- [llvm] [RISCV] Select zero splats of EEW=64 on RV32 (PR #107205)
via llvm-commits
- [llvm] 69657eb - [llc] Provide `opt` like verifier options (#106665)
via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
via llvm-commits
- [llvm] 59093ca - [AARCH64][SVE] Add intrinsics for SVE LUTI instructions (#97058)
via llvm-commits
- [clang] [llvm] [AARCH64][SVE] Add intrinsics for SVE LUTI instructions (PR #97058)
via llvm-commits
- [llvm] 3e948eb - [AArch64][NEON] Add intrinsics for LUTI (#96883)
via llvm-commits
- [clang] [llvm] [AArch64][NEON] Add intrinsics for LUTI (PR #96883)
via llvm-commits
- [lld] 519b369 - [LLD][COFF][NFC] Store impSym as DefinedImportData in ImportFile. (#107162)
via llvm-commits
- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
via llvm-commits
- [lld] wasm-ld: Add allow-multiple-definition flag (PR #97699)
via llvm-commits
- [llvm] 126d6f2 - [AMDGPU] Improve codegen for GFX10+ DPP reductions and scans (#107108)
via llvm-commits
- [llvm] 2fef449 - [LLVM][AArch64] Enable verifyTargetSDNode for scalable vectors and fix the fallout. (#104820)
via llvm-commits
- [llvm] 5818337 - LICM: hoist BO assoc when (C1 op LV) op C2 (#106999)
via llvm-commits
- [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)
via llvm-commits
- [llvm] cd46829 - [LV] Fix emission of debug message in legality check (#101924)
via llvm-commits
- [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)
via llvm-commits
- [llvm] 43b8ae3 - [AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (#107091)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)
via llvm-commits
- [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)
via llvm-commits
- [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)
via llvm-commits
- [llvm] [ADT] Deprecate DenseMap::FindAndConstruct (PR #107224)
via llvm-commits
- [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)
via llvm-commits
- [llvm] LV/test: regen a couple of tests with UTC (NFC) (PR #107225)
via llvm-commits
- [llvm] 2cf36f0 - [OpenMP]Update use_device_clause lowering (#101707)
via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
via llvm-commits
- [llvm] bb1b368 - [AArch64] Implement intrinsics for SVE FAMIN/FAMAX (#99042)
via llvm-commits
- [llvm] c2b92a4 - [SROA] Use SetVector for PromotableAllocas (#105809)
via llvm-commits
- [llvm] [SROA] Use SetVector for PromotableAllocas (PR #105809)
via llvm-commits
- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
via llvm-commits
- [compiler-rt] fix the module map of main executable on darwin platforms (PR #107227)
via llvm-commits
- [compiler-rt] fix the module map of main executable on darwin platforms (PR #107227)
via llvm-commits
- [compiler-rt] [TSan] fix the module map of main executable on darwin platforms (PR #107227)
via llvm-commits
- [compiler-rt] [TSan] fix the module map of main executable on darwin platforms (PR #107227)
via llvm-commits
- [compiler-rt] [TSan] fix the module map of main executable on darwin platforms (PR #107227)
via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
via llvm-commits
- [compiler-rt] [TSan] fix the module map of main executable on darwin platforms (PR #107227)
via llvm-commits
- [llvm] LICM: hoist BO assoc when BinOp is in RHS (PR #107072)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (PR #107230)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [CodeGen][NewPM] Fix linker error due to dummy `MachineVerifierPass` (PR #107237)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] 6238159 - [CodeGen][NewPM] Fix linker error due to dummy `MachineVerifierPass` (#107237)
via llvm-commits
- [llvm] [CodeGen][NewPM] Fix linker error due to dummy `MachineVerifierPass` (PR #107237)
via llvm-commits
- [llvm] [CodeGen][NewPM] Fix linker error due to dummy `MachineVerifierPass` (PR #107237)
via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
via llvm-commits
- [compiler-rt] [TSan] fix the module map of main executable on darwin platforms (PR #107227)
via llvm-commits
- [llvm] df5840f - [AMDGPU][Docs] Update product names for some targets (#106973)
via llvm-commits
- [llvm] [AMDGPU][Docs] Update product names for some targets (PR #106973)
via llvm-commits
- [lld] 3d53212 - [LLD][COFF] Initial support for ARM64EC importlibs. (#107164)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] f119151 - IVDescriptors: improve readability of a function (NFC) (#106219)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
via llvm-commits
- [compiler-rt] [llvm] [compiler-rt][rtsan] Introduce RTSAN_OPTIONS and flags (PR #107174)
via llvm-commits
- [llvm] 4552153 - [CodeGen][MachineCSE] Remove unused AA results(NFC) (#106604)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] 7732d8e - [ADT] Deprecate DenseMap::FindAndConstruct (#107224)
via llvm-commits
- [llvm] Revert "[llc] Provide `opt` like verifier options" (PR #107244)
via llvm-commits
- [llvm] Revert "[llc] Provide `opt` like verifier options" (PR #107244)
via llvm-commits
- [llvm] Revert "[llc] Provide `opt` like verifier options" (PR #107244)
via llvm-commits
- [llvm] Revert "[llc] Provide `opt` like verifier options" (PR #107244)
via llvm-commits
- [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)
via llvm-commits
- [llvm] [SCCP] Determine early whether GlobalVariable is Constant or not (PR #107245)
via llvm-commits
- [llvm] 30f1cfb - [TableGen] Print memory stats in detailed record emitter (#106990)
via llvm-commits
- [llvm] [SCCP] Determine early whether GlobalVariable is Constant or not (PR #107245)
via llvm-commits
- [llvm] [SCCP] Determine early whether GlobalVariable is Constant or not (PR #107245)
via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
via llvm-commits
- [llvm] [llc] Provide `opt` like verifier options (PR #106665)
via llvm-commits
- [llvm] Revert "[llc] Provide `opt` like verifier options" (PR #107244)
via llvm-commits
- [llvm] 8f77d37 - [DAGCombiner] cache negative result from getMergeStoreCandidates() (#106949)
via llvm-commits
- [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)
via llvm-commits
- [llvm] 3bc38fb - [InstCombine] Generalize and consolidate phi translation check (#106051)
via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
via llvm-commits
- [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)
via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
via llvm-commits
- [llvm] [Attributor] Skip AS specialization for volatile memory instructions (PR #107250)
via llvm-commits
- [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)
via llvm-commits
- [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)
via llvm-commits
- [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)
via llvm-commits
- [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)
via llvm-commits
- [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
via llvm-commits
- [llvm] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)
via llvm-commits
- [llvm] [LLVM][CodeGen][SVE] Implement nxvbf16 fpextend to nxvf32/nxvf64. (PR #107253)
via llvm-commits
- [llvm] [AMDGPU] Overload resource descriptor in image intrinsics. (PR #107255)
via llvm-commits
- [llvm] [AMDGPU] Overload resource descriptor in image intrinsics. (PR #107255)
via llvm-commits
- [llvm] [DWARF] Don't search scope chain to find DISubprogram for prologues (PR #107261)
via llvm-commits
- [lld] 0367305 - [lld][WebAssembly] Add allow-multiple-definition flag (#97699)
via llvm-commits
- [lld] [lld][WebAssembly] Add allow-multiple-definition flag (PR #97699)
via llvm-commits
- [llvm] [DWARF] Identify prologue_end by instruction rather than DILocation (PR #107264)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [LLVM][AArch64] Refactor sve-b16b16 instruction definitions. (PR #107265)
via llvm-commits
- [llvm] Bail out jump threading on indirect branches (PR #103688)
via llvm-commits
- [llvm] Bail out jump threading on indirect branches (PR #103688)
via llvm-commits
- [llvm] [Windows SEH] fix failed assert and crash (PR #107031)
via llvm-commits
- [llvm] b2223b4 - [WebAssembly] Rename legacy EH mir tests (#107189)
via llvm-commits
- [llvm] 32bc670 - [WebAssembly] Misc. fixes in CFGStackify (NFC) (#107182)
via llvm-commits
- [llvm] 26ba186 - [PowerPC] Improve pwr7 codegen for v4i8 load (#104507)
via llvm-commits
- [llvm] [PowerPC] Improve pwr7 codegen for v4i8 load (PR #104507)
via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
via llvm-commits
- [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)
via llvm-commits
- [clang] [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)
via llvm-commits
- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
via llvm-commits
- [llvm] 9a2fd97 - Reapply^2 "[HWASan] remove incorrectly inferred attributes" (#106622) (#106816)
via llvm-commits
- [llvm] [SVE2.1][AArch64] Fix crash for bfadd with scalable vector types (PR #107274)
via llvm-commits
- [llvm] [SVE2.1][AArch64] Fix crash for bfadd with scalable vector types (PR #107274)
via llvm-commits
- [llvm] 840da2e - [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (#106301)
via llvm-commits
- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
via llvm-commits
- [lld] [ELF][WASM] Update datalayout strings to latest version (PR #107276)
via llvm-commits
- [llvm] [SVE2.1][AArch64] Fix crash for bfadd with scalable vector types (PR #107274)
via llvm-commits
- [llvm] [Analysis] Update getPromotionCandidatesForInstruction description (NFC) (PR #107277)
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- [llvm] [DLCov 1/5] Add CMake option to enable enhanced line number coverage tracking (PR #107278)
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- [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)
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- [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)
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- [llvm] 6175951 - [Analysis] Update getPromotionCandidatesForInstruction description (NFC) (#107277)
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- [llvm] 6e60330 - [SampleFDO] Read call-graph matching recovered top-level function profile (#101053)
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- [llvm] 2e0ded3 - [Windows SEH] Fix crash on empty seh block (#107031)
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- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
via llvm-commits
- [llvm] [Windows SEH] Fix crash on empty seh block (PR #107031)
via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
via llvm-commits
- [llvm] 36c210b - [RISCV] Remove pre-assignment of mask vectors during call lowering. NFC (#107192)
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- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)
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- [llvm] [AMDGPU] Overload image atomic swap to allow float as well. (PR #107283)
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- [llvm] [AMDGPU] Overload image atomic swap to allow float as well. (PR #107283)
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- [llvm] [SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (PR #106301)
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- [llvm] [AArch64][SVE2] Add codegen patterns for SVE2 FAMINMAX (PR #107284)
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- [llvm] [AArch64][SVE2] Add codegen patterns for SVE2 FAMINMAX (PR #107284)
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- [llvm] a43137c - [LLVM][DWARF] Make some effort to avoid duplicates in .debug_ranges. (#106614)
via llvm-commits
- [llvm] [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (PR #107288)
via llvm-commits
- [llvm] [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (PR #107288)
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- [llvm] [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (PR #107290)
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- [llvm] [Instrumentation] Mark instrumented calls as implicit (PR #106447)
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- [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)
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- [llvm] [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (PR #107288)
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- [clang] [llvm] [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (PR #107293)
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- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
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- [llvm] [Instrumentation] Mark instrumented calls as implicit (PR #106447)
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- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
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- [llvm] [RISCV] Support fixed vector VP_LOAD/STORE for bf16 and f16 without Zvfh. (PR #107297)
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- [llvm] [Instrumentation] Mark instrumented calls as implicit (PR #106447)
via llvm-commits
- [llvm] [RISCV] Support fixed vector VP_LOAD/STORE for bf16 and f16 without Zvfh. (PR #107297)
via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns. (PR #107272)
via llvm-commits
- [llvm] [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (PR #107288)
via llvm-commits
- [llvm] [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (PR #107288)
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- [llvm] [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (PR #107288)
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- [llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)
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- [llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)
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- [llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)
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- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
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- [llvm] [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (PR #107288)
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- [llvm] DONT_MERGE: Reland "AtomicExpand: Allow incrementally legalizing atomicrmw" (PR #107309)
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- [llvm] [Target] Use templated MachineFunction::getSubtarget in *CallingConv.td. NFC (PR #107311)
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- [llvm] 16900d3 - LICM: hoist BO assoc when BinOp is in RHS (#107072)
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- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
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- [compiler-rt] [scudo] Use variable instead of recomputing. (PR #106647)
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- [compiler-rt] 1ff8657 - [scudo] Use variable instead of recomputing. (#106647)
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- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl (PR #107313)
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- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
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- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
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- [compiler-rt] [compiler-rt][nsan] Update UnwindImpl (PR #107313)
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- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
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- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
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- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
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- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
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- [compiler-rt] dd754cd - [compiler-rt][nsan] Update UnwindImpl (#107313)
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- [llvm] workflows/release-binaries: Fix automatic upload (PR #107315)
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- [llvm] dcf0160 - [TableGen] Optimize intrinsic info type signature encoding (#106809)
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- [llvm] [llvm][AArch64] Improve the cost model for i128 div's (PR #107306)
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- [llvm] 660cc98 - [TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (#107100)
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- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
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- [llvm] 98c6bbf - [TableGen] Refactor Intrinsics record (#106986)
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- [llvm] [SandboxIR] Implement ConstantAggregateZero (PR #107172)
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- [llvm] df50751 - [SandboxIR] Implement ConstantAggregateZero (#107172)
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- [llvm] [SandboxIR] Implement ConstantAggregateZero (PR #107172)
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- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
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- [clang] [clang-tools-extra] [lld] [lldb] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used. (PR #106810)
via llvm-commits
- [clang] [clang-tools-extra] [lld] [lldb] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used. (PR #106810)
via llvm-commits
- [llvm] [Minidump] Support multiple exceptions in a minidump (PR #107319)
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- [llvm] [SandboxIR] Implement ConstantPointerNull (PR #107320)
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- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
via llvm-commits
- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
via llvm-commits
- [llvm] [Attributor][FIX] Ensure to always translate call site arguments (PR #107323)
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- [llvm] [SandboxIR] Implement ConstantPointerNull (PR #107320)
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- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
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- [llvm] [SandboxIR] Implement ConstantPointerNull (PR #107320)
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- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
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- [llvm] 950bb68 - [SandboxIR] Implement ConstantPointerNull (#107320)
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- [llvm] [SandboxIR] Implement ConstantPointerNull (PR #107320)
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- [llvm] [SandboxIR] Implement PoisonValue (PR #107324)
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- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
via llvm-commits
- [llvm] aecbc92 - [WebAssembly] Rename CATCH/CATCH_ALL to *_LEGACY (#107187)
via llvm-commits
- [llvm] AMDGPU: Add a few unsupported checks for llvm.fptrunc.round intrinsic (PR #107330)
via llvm-commits
- [llvm] [DirectX] Fix crash in DXILOpBuilder for vector types (PR #107334)
via llvm-commits
- [llvm] [DirectX] Clean up trailing whitespace. NFC (PR #107335)
via llvm-commits
- [llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Lower G_BUILD_VECTOR to G_INSERT_VECTOR_ELT (PR #105686)
via llvm-commits
- [llvm] ef1ef03 - [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (#107288)
via llvm-commits
- [llvm] [BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (PR #107288)
via llvm-commits
- [llvm] c82a549 - [RISCV] Support fixed vector VP_LOAD/STORE for bf16 and f16 without Zvfh. (#107297)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [SVE2.1][AArch64] Fix crash for bfadd with scalable vector types (PR #107274)
via llvm-commits
- [llvm] [SVE2.1][AArch64] Fix crash for bfadd with scalable vector types (PR #107274)
via llvm-commits
- [llvm] [llvm][CodeGen] Resolve issues when updating live intervals in window scheduler (PR #101945)
via llvm-commits
- [llvm] eb2929d - [DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (#107101)
via llvm-commits
- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [ThinLTO] Shrink GlobalValueSummary by 8 bytes (PR #107342)
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- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
via llvm-commits
- [llvm] c28b1a1 - [LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (#107290)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
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- [lld] [lld][InstrProf] Refactor BPSectionOrderer.cpp (PR #107347)
via llvm-commits
- [lld] [lld][InstrProf] Refactor BPSectionOrderer.cpp (PR #107347)
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- [llvm] aad6997 - [RISCV] Fold PseudoVMV_V_V with undef passthru, handling policy (#106943)
via llvm-commits
- [lld] [lld][InstrProf] Sort startup functions for compression (PR #107348)
via llvm-commits
- [llvm] [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (PR #107339)
via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
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- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
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- [llvm] 1465e23 - [RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (#107079)
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- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
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- [llvm] 845d8d9 - [RISCV][TTI] Add cost of typebased cast VPIntrinsics with functionalOPC. (#97797)
via llvm-commits
- [llvm] 76be3a0 - [DirectX] Fix crash in DXILOpBuilder for vector types (#107334)
via llvm-commits
- [llvm] 787fc81 - [DirectX] Clean up trailing whitespace. NFC (#107335)
via llvm-commits
- [llvm] [SCCP] Determine early whether GlobalVariable is Constant or not (PR #107245)
via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
via llvm-commits
- [llvm] d18ca27 - Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (#107169)
via llvm-commits
- [llvm] Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (PR #107169)
via llvm-commits
- [llvm] [SCCP] Determine early whether GlobalVariable is Constant or not (PR #107245)
via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
via llvm-commits
- [llvm] 16cda01 - [AMDGPU] V_SET_INACTIVE optimizations (#98864)
via llvm-commits
- [llvm] [SCCP] Determine early whether GlobalVariable is Constant or not (PR #107245)
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- [llvm] [SCCP] Determine early whether GlobalVariable is Constant or not (PR #107245)
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- [llvm] [SCCP] Determine early whether GlobalVariable is Constant or not (PR #107245)
via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
via llvm-commits
- [clang] [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)
via llvm-commits
- [clang] [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)
via llvm-commits
- [clang] [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)
via llvm-commits
- [llvm] aafaa69 - [Target] Use templated MachineFunction::getSubtarget in *CallingConv.td. NFC (#107311)
via llvm-commits
- [llvm] [ARM] Avoid repeated hash lookups (NFC) (PR #107356)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [SimplifyCFG] Avoid introducing complex phi when removing empty blocks (PR #104887)
via llvm-commits
- [llvm] [SimplifyCFG] Avoid introducing complex phi when removing empty blocks (PR #104887)
via llvm-commits
- [llvm] [SimplifyCFG] Avoid increasing too many phi entries when removing empty blocks (PR #104887)
via llvm-commits
- [llvm] [SimplifyCFG] Avoid increasing too many phi entries when removing empty blocks (PR #104887)
via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)
via llvm-commits
- [llvm] 77f0488 - [AArch64] Combine zext of deinterleaving shuffle. (#107201)
via llvm-commits
- [llvm] [RISCV] Update V0Defs after moving Src in peepholes (PR #107359)
via llvm-commits
- [llvm] a7697c8 - [ARM] Do not assume alignment in vld1xN and vst1xN intrinsics (#106984)
via llvm-commits
- [llvm] 3d72957 - [RISCV] Model dest EEW and fix peepholes not checking EEW (#105945)
via llvm-commits
- [llvm] [WebAssembly] Tidy up a switch-case in CFGStackify (NFC) (PR #107360)
via llvm-commits
- [llvm] f006246 - [CodeGen] Add generic INIT_UNDEF pseudo (#106744)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (PR #107361)
via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
via llvm-commits
- [llvm] 3e47883 - Recover performance loss after PagedVector introduction (#67972)
via llvm-commits
- [clang] [llvm] Recover performance loss after PagedVector introduction (PR #67972)
via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
via llvm-commits
- [clang] [llvm] [AArch64] Implement NEON vamin/vamax intrinsics (PR #99041)
via llvm-commits
- [llvm] [AArch64] Fold away zext of extract of uzp. (PR #107367)
via llvm-commits
- [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)
via llvm-commits
- [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)
via llvm-commits
- [llvm] [AArch64] Fold away zext of extract of uzp. (PR #107367)
via llvm-commits
- [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)
via llvm-commits
- [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)
via llvm-commits
- [llvm] [CodeGen][NewPM] Use verify-each option in npm tests (NFC). (PR #107373)
via llvm-commits
- [llvm] a95b212 - [DWARF] Don't search scope chain to find DISubprogram for prologues (#107261)
via llvm-commits
- [llvm] [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns [NFC] (PR #107374)
via llvm-commits
- [llvm] [IR] Check parameters of target extension types on construction (PR #107268)
via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
via llvm-commits
- [llvm] 5ee7395 - [AMDGPU] Add image_atomic_fmin/fmax as aliases for GFX12 (#107242)
via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
via llvm-commits
- [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)
via llvm-commits
- [llvm] 3299bc8 - [DWARF] Identify prologue_end by instruction rather than DILocation (#107264)
via llvm-commits
- [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)
via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
via llvm-commits
- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
via llvm-commits
- [llvm] 95684af - [IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (#107230)
via llvm-commits
- [lld] [LLD][COFF][NFC] Use is64Bit in Baserel::getDefaultType. (PR #107378)
via llvm-commits
- [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)
via llvm-commits
- [llvm] LoopSimplify: strip unused pass dependencies (NFC) (PR #107379)
via llvm-commits
- [llvm] [LSR] Do not create duplicated PHI nodes while preserving LCSSA form (PR #107380)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
via llvm-commits
- [llvm] 07bef02 - [OpenMPOpt] Initialize OpenMPIRBuilderConfig::IsGPU flag (#104456)
via llvm-commits
- [llvm] LIR: strip unused LAA header dependency (NFC) (PR #107382)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
via llvm-commits
- [llvm] [mlir] [tosa-fuser] Affine Fusion Pass (PR #107383)
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- [llvm] [mlir] [tosa-fuser] Affine Fusion Pass (PR #107383)
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- [llvm] [mlir] [tosa-fuser] Affine Fusion Pass (PR #107383)
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- [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)
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- [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)
via llvm-commits
- [llvm] b44d9e5 - VPlanTransforms: fix style after cursory reading (NFC) (#105827)
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- [llvm] [Windows SEH] Fix crash on empty seh block (PR #107031)
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- [llvm] [Windows SEH] Fix crash on empty seh block (PR #107031)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
via llvm-commits
- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
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- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
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- [llvm] [Instrumentation] Mark instrumented calls as implicit (PR #106447)
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- [llvm] [AArch64] Remove redundant COPY from loadRegFromStackSlot (PR #107396)
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- [llvm] 2c3da17 - LIR: strip unused LAA header dependency (NFC) (#107382)
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- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [llvm] [AArch64] Generate rev16 for certain uses of __builtin_bswap16 (PR #105375)
via llvm-commits
- [clang] [llvm] [NFC][SystemZ][z/OS] Rename autoconversion-related functions to be less generic (PR #107399)
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- [llvm] [LLVM][rtsan] Add `sanitize_realtime_unsafe` attribute (PR #106754)
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- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
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- [llvm] 7f0c5b0 - [AArch64]Fix invalid use of ld1/st1 in stack alloc (#105518)
via llvm-commits
- [llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)
via llvm-commits
- [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] 0ba7818 - [X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns [NFC] (#107374)
via llvm-commits
- [lld] 233ed51 - [LLD][COFF][NFC] Use is64Bit in Baserel::getDefaultType. (#107378)
via llvm-commits
- [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)
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- [llvm] [AArch64] Remove redundant COPY from loadRegFromStackSlot (PR #107396)
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- [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)
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- [llvm] bded3b3 - [llvm][AArch64] Improve the cost model for i128 div's (#107306)
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- [llvm] 63e8a1b - [SLP] Enable reordering for non-power-of-two vectors (#106638)
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- [llvm] [AArch64] replace SVE intrinsics with no active lanes with zero (PR #107413)
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- [llvm] [AArch64] replace SVE intrinsics with no active lanes with zero (PR #107413)
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- [llvm] [AArch64] replace SVE intrinsics with no active lanes with zero (PR #107413)
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- [lld] [lld/mac] Allow -segprot having stricter initprot than maxprot on mac (PR #107269)
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- [lld] [lld/mac] Allow -segprot having stricter initprot than maxprot on mac (PR #107269)
via llvm-commits
- [lld] [lld/mac] Allow -segprot having stricter initprot than maxprot on mac (PR #107269)
via llvm-commits
- [llvm] [MC] Introduce ability to add target specific AsmStreamer (PR #107415)
via llvm-commits
- [llvm] [MC] Introduce ability to add target specific AsmStreamer (PR #107415)
via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
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- [flang] [llvm] [OpenMP][Flang] Fix dynamic-extent array mapping (PR #107247)
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- [flang] [llvm] [OpenMP][Flang] Fix dynamic-extent array mapping (PR #107247)
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- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
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- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
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- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
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- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
via llvm-commits
- [llvm] aea3b0f - [ARM] Avoid repeated hash lookups (NFC) (#107356)
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- [llvm] SelectionDAG: Remove unneeded getSelectCC in expandFMINIMUMNUM_FMAXIMUMNUM (PR #107416)
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- [llvm] 13013bd - [RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (#107361)
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- [llvm] 2f6e4ed - [IR] Check parameters of target extension types on construction (#107268)
via llvm-commits
- [clang] [llvm] [NFC][SystemZ][z/OS] Rename autoconversion-related functions to be less generic (PR #107399)
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- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
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- [llvm] fc3e6a8 - DAG: Handle lowering unordered compare with inf (#100378)
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- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
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- [compiler-rt] [llvm] [compiler-rt][rtsan] Introduce RTSAN_OPTIONS and flags (PR #107174)
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- [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)
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- [llvm] c2018fa - [NFC][Support] Refactor FormatVariadic code. (#106610)
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- [llvm] be1958f - [LLVM][CodeGen][SVE] Implement nxvbf16 fpextend to nxvf32/nxvf64. (#107253)
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- [llvm] [LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (PR #107420)
via llvm-commits
- [lld] 62e6c1e - [lld/mac] Allow -segprot having stricter initprot than maxprot on mac (#107269)
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- [llvm] ce36480 - [RISCV] Update V0Defs after moving Src in peepholes (#107359)
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- [llvm] [RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (PR #106108)
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- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] [mlir] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)
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- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
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- [llvm] 5edede2 - [DXIL] Add sign intrinsic part 2 (#101988)
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- [llvm] 0818c28 - [WebAssembly] Simplify a switch-case in CFGStackify (NFC) (#107360)
via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] 91a3c6f - [AArch64] Remove redundant COPY from loadRegFromStackSlot (#107396)
via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
via llvm-commits
- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
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- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
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- [compiler-rt] [scudo] Add a method to use a hard-coded page size (PR #106646)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] 54194e1 - [RISCV][SiFive7] Change `Latency` of VCIX to the default (#106497)
via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
via llvm-commits
- [llvm] [AArch64] Remove redundant COPY from loadRegFromStackSlot (PR #107396)
via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
via llvm-commits
- [llvm] 311ac63 - [NFC][SystemZ][z/OS] Rename autoconversion-related functions to be less generic (#107399)
via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [Transforms][IPO] Add func suffix in ArgumentPromotion and DeadArgume… (PR #105742)
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- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
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- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
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- [llvm] 5e25291 - [SandboxIR][Bench] Initial patch for performance tracking (#107296)
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- [llvm] [SandboxIR][Bench] Initial patch for performance tracking (PR #107296)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [Attributor][FIX] Mark "may" accesses through call sites as such (PR #107439)
via llvm-commits
- [llvm] ebc7f55 - [llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (#107032)
via llvm-commits
- [llvm] bedac64 - [llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (#107038)
via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
via llvm-commits
- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
via llvm-commits
- [compiler-rt] 4d819da - [compiler-rt] Simplify definition of uptr
via llvm-commits
- [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)
via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [MC] Introduce ability to add target specific AsmStreamer (PR #107415)
via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [SandboxIR][Bench] Test RAUW (PR #107440)
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- [llvm] [DSE] Optimizing shrinking of memory intrinsic (PR #106425)
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- [llvm] [X86] Shrink width of masked loads/stores (PR #105451)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
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- [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)
via llvm-commits
- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
via llvm-commits
- [libc] [llvm] [libc] Fix undefined behavior for nan functions. (PR #106468)
via llvm-commits
- [libc] [llvm] [libc] Fix undefined behavior for nan functions. (PR #106468)
via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
via llvm-commits
- [llvm] 9df592f - [AArch64] Fold away zext of extract of uzp. (#107367)
via llvm-commits
- [llvm] [SandboxIR][Bench] Test RAUW (PR #107440)
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- [llvm] 362da64 - [SandboxIR][Bench] Test RAUW (#107440)
via llvm-commits
- [llvm] [SandboxIR][Bench] Test RAUW (PR #107440)
via llvm-commits
- [llvm] f32e5bd - [NFC] Rename the `Nr` abbreviation to `Num` (#107151)
via llvm-commits
- [llvm] [SandboxIR][Bench] Benchmark RUOW (PR #107456)
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- [llvm] [Attributor][NFC] Pre-commits for #107439 (PR #107457)
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- [llvm] [ctx_prof] Flattened profile lowering pass (PR #107329)
via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
via llvm-commits
- [clang] [llvm] [CodeView] Flatten cmd args in frontend for LF_BUILDINFO (PR #106369)
via llvm-commits
- [llvm] [llvm-lit] Fix `TypeError` string argument expected in lit's internal shell (PR #105925)
via llvm-commits
- [llvm] 3726f9c - [Attributor][NFC] Pre-commits for #107439 (#107457)
via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
via llvm-commits
- [llvm] [SLP]Vectorize of gathered loads (PR #107461)
via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
via llvm-commits
- [llvm] e6dece9 - [Attributor][FIX] Mark "may" accesses through call sites as such (#107439)
via llvm-commits
- [llvm] [LLVM][AArch64] Refactor sve-b16b16 instruction definitions. (PR #107265)
via llvm-commits
- [llvm] 84bf0da - [Attributor][FIX] Ensure to always translate call site arguments (#107323)
via llvm-commits
- [llvm] 52dca6f - [SandboxVec] Boilerplate (#107431)
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- [llvm] [SandboxVec] Boilerplate (PR #107431)
via llvm-commits
- [llvm] [ctx_prof] Handle case when no root is in this Module. (PR #107463)
via llvm-commits
- [compiler-rt] 4634a48 - [scudo] Add a method to use a hard-coded page size (#106646)
via llvm-commits
- [llvm] [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (PR #107464)
via llvm-commits
- [llvm] [SandboxVec] Early return checks (PR #107465)
via llvm-commits
- [llvm] [SandboxVec] Early return checks (PR #107465)
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- [lld] 64498c5 - [LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (#106670)
via llvm-commits
- [llvm] 50be455 - [TableGen] Add check for number of intrinsic return values (#107326)
via llvm-commits
- [compiler-rt] [scudo] Add fragmentation info for each memory group (PR #107475)
via llvm-commits
- [compiler-rt] [scudo] Add fragmentation info for each memory group (PR #107475)
via llvm-commits
- [lld] 3380dae - [lld][InstrProf] Refactor BPSectionOrderer.cpp (#107347)
via llvm-commits
- [llvm] e44a675 - AMDGPU: Add a few unsupported checks for llvm.fptrunc.round intrinsic (#107330)
via llvm-commits
- [llvm] [SandboxVec] Early return checks (PR #107465)
via llvm-commits
- [llvm] bd840a4 - [AMDGPU] Add target intrinsic for s_prefetch_data (#107133)
via llvm-commits
- [llvm] [SandboxVec] Early return checks (PR #107465)
via llvm-commits
- [llvm] [SandboxVec] Boilerplate (PR #107431)
via llvm-commits
- [llvm] [SLP]Vectorize of gathered loads (PR #107461)
via llvm-commits
- [llvm] c1c4251 - [SandboxVec] Early return checks (#107465)
via llvm-commits
- [llvm] [SandboxVec] Early return checks (PR #107465)
via llvm-commits
- [llvm] AMDGPU: Add f64 to f32 support for llvm.fptrunc.round (PR #107481)
via llvm-commits
- [llvm] 169d453 - [ADT] Declare replaceAllocation in SmallVector.cpp (NFC) (#107469)
via llvm-commits
- [llvm] [RISCV] Separate the calling convention handlers into their own file. (PR #107484)
via llvm-commits
- [clang] [llvm] [NFCI]Clean up synthetic count pass (PR #107471)
via llvm-commits
- [llvm] [SandboxIR] Add bazel support (PR #107486)
via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
via llvm-commits
- [clang] [llvm] [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (PR #107471)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [SLPVectorizer] Avoid repeated hash lookups (NFC) (PR #107491)
via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #107493)
via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #107493)
via llvm-commits
- [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)
via llvm-commits
- [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)
via llvm-commits
- [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)
via llvm-commits
- [clang] [lld] [llvm] [X86, lld] Add relocation R_X86_64_REX2_GOTPCRELX (PR #106681)
via llvm-commits
- [llvm] [SimplifyCFG] Avoid increasing too many phi entries when removing empty blocks (PR #104887)
via llvm-commits
- [llvm] 2949720 - [RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (#106108)
via llvm-commits
- [llvm] 144314e - [SLPVectorizer] Avoid repeated hash lookups (NFC) (#107491)
via llvm-commits
- [llvm] [RISCV] Reduce the interface to RISCVCCAssignFn. NFC (PR #107503)
via llvm-commits
- [llvm] [RISCV][TTI] Add vp.cmp intrinsic cost with functionalOPC. (PR #107504)
via llvm-commits
- [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)
via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
via llvm-commits
- [llvm] [IndVars] Avoid repeated hash lookups (NFC) (PR #107513)
via llvm-commits
- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
via llvm-commits
- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
via llvm-commits
- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
via llvm-commits
- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
via llvm-commits
- [llvm] [Convergence] Avoid repeated hash lookups (NFC) (PR #107515)
via llvm-commits
- [lld] [lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (PR #106573)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] 77f1b48 - DAG: Lower single infinity is.fpclass tests to fcmp (#100380)
via llvm-commits
- [llvm] 093b8bf - [RISCV] Separate the calling convention handlers into their own file. NFC (#107484)
via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
via llvm-commits
- [llvm] [LoongArch] Codegen for concat_vectors with LASX (PR #107523)
via llvm-commits
- [llvm] [LoongArch] Codegen for concat_vectors with LASX (PR #107523)
via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
via llvm-commits
- [llvm] [DebugInfo][AIX] XFAIL debug-ranges-duplication.ll (PR #107525)
via llvm-commits
- [llvm] 24267a7 - AMDGPU: Add f64 to f32 support for llvm.fptrunc.round (#107481)
via llvm-commits
- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
via llvm-commits
- [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)
via llvm-commits
- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
via llvm-commits
- [llvm] [X86][MC] Cont. update for AVX10.2-BF16 (PR #107529)
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- [llvm] 6fb39e4 - [AVR][NFC] Reformat MC tests (#107068)
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- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
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- [llvm] df93327 - [LoongArch] Legalize ISD::CTPOP for GRLenVT type with LSX
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- [llvm] [LoongArch] Legalize ISD::CTPOP for GRLenVT type with LSX (PR #106941)
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- [llvm] [LoongArch] Legalize ISD::CTPOP for GRLenVT type with LSX (PR #106941)
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- [llvm] [LoongArch] Add TTI support for cpop with LSX (PR #106961)
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- [llvm] [LoongArch] Add TTI support for cpop with LSX (PR #106961)
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- [llvm] [AArch64] Do not generate uitofp(ld4) where and/shift can be used. (PR #107538)
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- [llvm] 5602bd5 - [gn build] Bump macOS target to 12 and make it configurable (#107492)
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- [llvm] [LV] Check for vector-to-scalar casts in legalizer (PR #106244)
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- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
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- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
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- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
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- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
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- [llvm] [LV] Check for vector-to-scalar casts in legalizer (PR #106244)
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- [llvm] 861caf9 - [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (#107245)
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- [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)
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- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
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- [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] 310b0a1 - [llvm-ml] Adds /quiet flag to llvm-ml (#107308)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [lld] 691e3c6 - [lld-macho] Fix `Defined` size increase with `-mms-bitfields` (#107545)
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- [llvm] [SCCP] Remove LoadInst if it loaded from Constant GlobalVariable (PR #107245)
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- [llvm] 78e1e6a - [LV] Check for vector-to-scalar casts in legalizer (#106244)
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- [llvm] [LV] Check for vector-to-scalar casts in legalizer (PR #106244)
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- [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)
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- [llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)
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- [clang] [llvm] [CodeView] Flatten cmd args in frontend for LF_BUILDINFO (PR #106369)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)
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- [llvm] [SROA] Conservatively do not split the alloca if ptr is laundered (PR #107557)
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- [lld] [LLD][RISCV] Warn on PCREL_LO referencing other Section (PR #107558)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] 50be4f1 - [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (#106975)
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- [llvm] [AMDGPU] Skip lowerNonKernelLDSAccesses if function is declaration. (PR #106975)
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- [lld] [LLD][RISCV] Warn on PCREL_LO referencing other Section (PR #107558)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [llvm] 704da91 - [DebugInfo][AIX] XFAIL debug-ranges-duplication.ll (#107525)
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- [compiler-rt] [llvm] Recommit "[FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function" (PR #105559)
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- [llvm] 222d3b0 - [TBAA] Fix the case where a subobject gets accessed at a non-zero offset. (#101485)
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- [llvm] [LV] Check for vector-to-scalar casts in legalizer (PR #106244)
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- [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)
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- [llvm] [RISCV][TTI] Implement cost for vp min/max intrinsics (PR #107567)
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- [llvm] [RISCV][TTI] Implement cost for vp min/max intrinsics (PR #107567)
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- [llvm] [RISCV][TTI] Implement cost for vp min/max intrinsics (PR #107567)
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- [llvm] c9bdc25 - [X86][MC] Cont. update for AVX10.2-BF16 (#107529)
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- [llvm] [LV] Check for vector-to-scalar casts in legalizer (PR #106244)
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- [lld] [lld-macho] Disable static assert failing on several platforms (PR #107514)
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- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
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- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [llvm] 1f70fce - [Clang][AArch64] Add customisable immediate range checking to NEON (#100278)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [llvm] fb6c10d - [MC] Emit a jump table size section (#101962)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
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- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
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- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
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- [llvm] [AArch64] Lower __builtin_bswap16 to rev16 if bswap followed by any_extend (PR #105375)
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- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
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- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
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- [llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)
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- [llvm] 52fac60 - [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (#107259)
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- [llvm] [SLP] Move some of X86 tests to common directory (PR #107587)
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- [lld] [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (PR #107588)
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- [llvm] bf57ecf - [AArch64] Prevent generating tbl instruction instead of smull (#106375)
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- [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)
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- [libc] [llvm] [LIBC][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (PR #107542)
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- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] [M68k] allow 16-bit registers for MOVE to/from CCR (PR #107591)
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- [llvm] [M68k] allow 16-bit registers for MOVE to/from CCR (PR #107591)
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- [llvm] a9daad8 - AMDGPU: Update live intervals in convertToThreeAddress (#104610)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] 9528bcd - [IRSim] Avoid repeated hash lookups (NFC) (#107510)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] bd15595 - [IndVars] Avoid repeated hash lookups (NFC) (#107513)
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- [llvm] 2461bc1 - [Convergence] Avoid repeated hash lookups (NFC) (#107515)
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- [llvm] [RISCV] Add reductions to list of roots in tryToReduceVL (PR #107595)
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- [llvm] 109cd11 - [Attributor] Skip AS specialization for volatile memory instructions (#107250)
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- [llvm] [AArch64] Lower __builtin_bswap16 to rev16 if bswap followed by any_extend (PR #105375)
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- [llvm] 4af249f - Add usub_cond and usub_sat operations to atomicrmw (#105568)
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- [llvm] [AArch64] Lower __builtin_bswap16 to rev16 if bswap followed by any_extend (PR #105375)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
via llvm-commits
- [clang] [llvm] [AArch64] Implement NEON vamin/vamax intrinsics (PR #99041)
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- [llvm] 61ba60c - [orc] Avoid pathological propogation order (#107488)
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- [llvm] 2cb4d1b - [LSR] Do not create duplicated PHI nodes while preserving LCSSA form (#107380)
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- [llvm] 00e40c9 - [LV] Support binary and unary operations with EVL-vectorization (#93854)
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- [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)
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- [llvm] deba134 - [Minidump] Support multiple exceptions in a minidump (#107319)
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- [libc] [llvm] [libc][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (PR #107542)
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- [libc] [llvm] [libc][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (PR #107542)
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- [lld] ce91e21 - [lld][InstrProf] Sort startup functions for compression (#107348)
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- [llvm] 62180df - [RISCV] Reduce the interface to RISCVCCAssignFn. NFC (#107503)
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- [llvm] ce2e386 - [Attributor] Add support for atomic operations in `AAAddressSpace` (#106927)
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- [llvm] [ADT] Remove the const variant of LookupBucketFor in DenseMap (PR #107608)
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- [llvm] [X86] LowerSELECTWithCmpZero - extend branchless OR/XOR select codegen to handle ADD/SUB as well (PR #107612)
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- [llvm] 0ffa377 - [ThinLTO] Shrink GlobalValueSummary by 8 bytes (#107342)
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- [llvm] [SandboxVec] Implement Pass class (PR #107617)
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- [llvm] [SandboxVec] Implement Pass class (PR #107617)
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- [llvm] 2e9b331 - [compiler-rt][rtsan] Introduce RTSAN_OPTIONS and flags (#107174)
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- [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)
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- [compiler-rt] [compiler-rt][rtsan] Improve error message wording to match ASan style (PR #107620)
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- [llvm] [X86] LowerSELECTWithCmpZero - extend branchless OR/XOR select codegen to handle ADD/SUB as well (PR #107612)
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- [llvm] [X86] LowerSELECTWithCmpZero - extend branchless OR/XOR select codegen to handle ADD/SUB as well (PR #107612)
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- [llvm] [SandboxVec] Implement Pass class (PR #107617)
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- [llvm] a657779 - LV: fix style after cursory reading (NFC) (#105830)
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- [llvm] [SandboxVec] Implement Pass class (PR #107617)
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- [llvm] [RISCV] Support fastcc passing scalable vectors indirectly with no free GPRs. (PR #107623)
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- [llvm] [RISCV] Support fastcc passing scalable vectors indirectly with no free GPRs. (PR #107623)
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- [llvm] 59f8796 - Initial changes for llvm shared library build using explicit visibility annotations
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- [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)
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- [llvm] c014db4 - [ADT] Remove the const variant of LookupBucketFor in DenseMap (#107608)
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- [llvm] [SandboxVec] Implement Pass class (PR #107617)
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- [llvm] [SandboxVec] Implement Pass class (PR #107617)
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- [llvm] [SandboxVec] Implement Pass class (PR #107617)
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- [llvm] [SandboxVec] Implement Pass class (PR #107617)
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- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
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- [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)
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- [llvm] [SandboxIR] Implement PoisonValue (PR #107324)
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- [llvm] [SandboxIR] Implement PoisonValue (PR #107324)
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- [llvm] fd2da9e - [SandboxIR] Implement PoisonValue (#107324)
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- [llvm] [SandboxIR] Implement PoisonValue (PR #107324)
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- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [llvm] 0745219 - [AMDGPU] Add target intrinsic for s_buffer_prefetch_data (#107293)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [compiler-rt] 5d146c6 - [compiler-rt][rtsan] Introduce rtsan_interface.h and ScopedDisabler (#106736)
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- [llvm] [ArgPromotion] Perform alias analysis on actual arguments of Calls (PR #106216)
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- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
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- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [llvm] [LV] Added verification of EVL recipes (PR #107630)
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- [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)
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- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
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- [compiler-rt] d60ca0c - [compiler-rt][builtins]Adjust complex division for aarch64 (#106664)
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- [llvm] [Vectorize] Update comment of getSubdividedVectorType (PR #107632)
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- [llvm] [Vectorize] Update comment of getSubdividedVectorType (PR #107632)
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- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [LTO] Modernize AliasSummary and ModuleSummaryIndex (NFC) (PR #107633)
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- [llvm] [LegalizeIntegerTypes] Simplify ExpandIntRes_FP_TO_XINT when operand needs to be SoftPromoted. (PR #107634)
via llvm-commits
- [llvm] [AMDGPU] Overload image atomic swap to allow float as well. (PR #107283)
via llvm-commits
- [llvm] [MC] Introduce ability to add target specific AsmStreamer (PR #107415)
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- [compiler-rt] [compiler-rt][rtsan] Use Die instead of exit, define cf.exitcode (PR #107635)
via llvm-commits
- [llvm] [AMDGPU] Overload resource descriptor in image intrinsics. (PR #107255)
via llvm-commits
- [llvm] [Vectorize] Update comment of getSubdividedVectorType (PR #107632)
via llvm-commits
- [clang] [llvm] [CodeView] Flatten cmd args in frontend for LF_BUILDINFO (PR #106369)
via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
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- [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)
via llvm-commits
- [llvm] [SandboxIR] Implement UndefValue (PR #107628)
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- [llvm] [Vectorize] Update comment of getSubdividedVectorType (PR #107632)
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- [llvm] [Vectorize] Update comment of getSubdividedVectorType (PR #107632)
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- [llvm] [Vectorize] Update comment of getSubdividedVectorType (PR #107632)
via llvm-commits
- [llvm] 941841b - [Vectorize] Update comment of getSubdividedVectorType (#107632)
via llvm-commits
- [llvm] [Vectorize] Update comment of getSubdividedVectorType (PR #107632)
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- [compiler-rt] 787cd8f - [InstrProf] Add debuginfod correlation support (#106606)
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- [compiler-rt] [llvm] [InstrProf] Add debuginfod correlation support (PR #106606)
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- [llvm] 6cb2d40 - [ctx_prof] Handle case when no root is in this Module. (#107463)
via llvm-commits
- [llvm] 775c507 - [ctx_prof] Flattened profile lowering pass (#107329)
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- [llvm] [WIP] [IR] Add `llvm.sincos` intrinsic (PR #107639)
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- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
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- [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)
via llvm-commits
- [llvm] Fix compiler errors in GVN.h for clang versions older than 15 (PR #107636)
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- [llvm] 70fcdb3 - [llvm][support] Implement tracing virtual file system (#88326)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [llvm] [MemProf] Remove unnecessary data structure (NFC) (PR #107643)
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- [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
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- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
via llvm-commits
- [llvm] [llvm][Support] Add support for thread naming for Haiku (PR #107646)
via llvm-commits
- [llvm] [SandboxVec] Implement Pass class (PR #107617)
via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
via llvm-commits
- [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)
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- [llvm] [GISel] Use Function::getFunctionType() instead of getType() in some remarks. (PR #107651)
via llvm-commits
- [llvm] 49660e5 - [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (#107464)
via llvm-commits
- [clang] [llvm] Fix build errors with a `LLVM_ENABLE_MODULES=ON` build (PR #107654)
via llvm-commits
- [clang] [llvm] Fix build errors with a `LLVM_ENABLE_MODULES=ON` build (PR #107654)
via llvm-commits
- [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)
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- [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)
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- [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)
via llvm-commits
- [llvm] d5d3f98 - [LTO] Modernize AliasSummary and ModuleSummaryIndex (NFC) (#107633)
via llvm-commits
- [llvm] [NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handeling (PR #107655)
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- [llvm] d1b9adb - Fix compiler errors in GVN.h for clang versions older than 15 (#107636)
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- [llvm] d4ddf06 - [NFCI]Remove EntryCount from FunctionSummary and clean up surrounding synthetic count passes. (#107471)
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- [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)
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- [llvm] d5ef3f8 - [RISCV] Support fastcc passing scalable vectors indirectly with no free GPRs. (#107623)
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- [compiler-rt] [llvm] [Coverage] Ignore unused functions if the count is 0. (PR #107661)
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- [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
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- [llvm] [LSR] Do not create duplicated PHI nodes while preserving LCSSA form (PR #107380)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [clang] [llvm] [llvm][Triple] Add `Environment` members and parsing for glibc/musl parity. (PR #107664)
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- [clang] [llvm] [llvm][Triple] Add `Environment` members and parsing for glibc/musl parity. (PR #107664)
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- [clang] [llvm] [llvm][Triple] Add `Environment` members and parsing for glibc/musl parity. (PR #107664)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] Revert "[LSR] Do not create duplicated PHI nodes while preserving LCSSA form" (PR #107666)
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- [llvm] 2bf551e - Revert "[LSR] Do not create duplicated PHI nodes while preserving LCSSA form" (#107666)
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- [llvm] Revert "[LSR] Do not create duplicated PHI nodes while preserving LCSSA form" (PR #107666)
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- [llvm] Revert "[LSR] Do not create duplicated PHI nodes while preserving LCSSA form" (PR #107666)
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- [llvm] Revert "[LSR] Do not create duplicated PHI nodes while preserving LCSSA form" (PR #107666)
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- [llvm] 9a84afe - Fix build errors with a `LLVM_ENABLE_MODULES=ON` build (#107654)
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- [llvm] e6e857c - [GISel] Use Function::getFunctionType() instead of getType() in some remarks. (#107651)
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- [compiler-rt] [compiler-rt] Replace assignment w/.set directive (PR #107667)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] 3242e77 - [ARM][Codegen] Fix vector data miscompilation in arm32be (#105519)
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- [llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)
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- [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #107669)
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- [llvm] [DFAJumpThreading] Avoid repeated hash lookups (NFC) (PR #107670)
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- [llvm] [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. (PR #107671)
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- [clang] [llvm] [Clang][AArch64] Add customisable immediate range checking to NEON (PR #100278)
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- [llvm] [InstCombine] Canonicalize non-i8 gep of mul to i8 (PR #96606)
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- [llvm] [InstCombine] Canonicalize non-i8 gep of mul to i8 (PR #96606)
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- [compiler-rt] [libcxx] [libcxxabi] [libunwind] [libunwind][libcxx][libcxxabi][compiler-rt-builtins] Fix Exception Handling build for wasm (PR #79667)
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- [llvm] [Clang][Codegen] fix vector data by modifying VMVN (PR #105913)
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- [llvm] 6df1291 - [X86] LowerSELECTWithCmpZero - extend branchless OR/XOR select codegen to handle ADD/SUB as well (#107612)
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- [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)
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- [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)
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- [llvm] LCA: migrate from DA to LAA; fix cost computation (PR #107691)
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- [llvm] LCA: migrate from DA to LAA; fix cost computation (PR #107691)
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- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
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- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
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- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
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- [llvm] 0ceffd3 - [TableGen] Add PrintError family overload that take a print function (#107333)
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- [llvm] [AMDGPU] Remove unnecessary untieRegOperand (PR #107695)
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- [llvm] [Sanitizer] Extend DiagnosticInfo for IR Instrumentation reporting. (PR #106356)
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- [llvm] [Sanitizer] Create DiagnosticInfoInstrumentation for IR Instrumentation reporting. (PR #106356)
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- [llvm] [SandboxIR][Bench] Fix build (PR #107699)
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- [llvm] [SandboxIR][Bench] Fix build (PR #107699)
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- [llvm] [SandboxIR][Bench] Fix build (PR #107699)
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- [llvm] 307713a - [AArch64] Do not generate uitofp(ld4) where and/shift can be used. (#107538)
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- [llvm] 4b676e1 - [TableGen] Avoid repeated hash lookups (NFC) (#107669)
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- [llvm] 23a26e7 - [DFAJumpThreading] Avoid repeated hash lookups (NFC) (#107670)
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- [llvm] [LLVM]Fix symbol visibility macros not being define for AIX (PR #107705)
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- [llvm] [ThinLTO] Shrink FunctionSummary by 8 bytes (PR #107706)
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- [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #107710)
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- [llvm] 51d3829 - [ThinLTO] Shrink FunctionSummary by 8 bytes (#107706)
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- [llvm] 6f6100f - [Bitcode] Avoid repeated hash lookups (NFC) (#107708)
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- [llvm] a0c43be - [TableGen] Avoid repeated hash lookups (NFC) (#107710)
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- [llvm] [SandboxIR][Bench] Fix build (PR #107699)
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- [compiler-rt] 3d0f44f - [rtsan] Add basic test for c compilation (#107717)
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- [compiler-rt] [rtsan] Add basic test for c compilation (PR #107717)
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- [compiler-rt] dbb03f8 - [compiler-rt] Replace assignment w/.set directive (#107667)
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- [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)
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- [compiler-rt] [compiler-rt] prctl interception update, SECCOMP_MODE_FILTER support. (PR #107722)
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- [compiler-rt] [compiler-rt] prctl interception update, SECCOMP_MODE_FILTER support. (PR #107722)
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- [llvm] c1e3b99 - [TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)
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- [llvm] 98563b1 - [libc][TableGen] Migrate libc-hdrgen backend to use const RecordKeeper (#107542)
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- [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)
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- [llvm] [TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (PR #107697)
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- [llvm] [ThinLTO] Use DenseMap for OidGuidMap (PR #107725)
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- [llvm] [IROutliner] Avoid repeated hash lookups (NFC) (PR #107726)
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- [llvm] [Transforms] Avoid repeated hash looksup (NFC) (PR #107727)
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- [llvm] [Vectorize] Avoid repeated hash lookups (NFC) (PR #107729)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] 482e7dc - [ThinLTO] Use DenseMap for OidGuidMap (#107725)
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- [llvm] caebb45 - [Transforms] Avoid repeated hash looksup (NFC) (#107727)
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- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
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- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)
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- [llvm] [SandboxIR][Bench] Fix build (PR #107699)
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- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [llvm] 49e3860 - [Sanitizer] Create DiagnosticInfoInstrumentation for IR Instrumentation reporting. (#106356)
via llvm-commits
- [llvm] [Sanitizer] Create DiagnosticInfoInstrumentation for IR Instrumentation reporting. (PR #106356)
via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
via llvm-commits
- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
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- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
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- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
via llvm-commits
- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
via llvm-commits
- [llvm] f5aad24 - [IROutliner] Avoid repeated hash lookups (NFC) (#107726)
via llvm-commits
- [llvm] bc59b63 - [Vectorize] Avoid repeated hash lookups (NFC) (#107729)
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- [llvm] 1d44ecb - [AMDGPU] Remove unnecessary untieRegOperand (#107695)
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- [llvm] Fixes #104875 (PR #107741)
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- [llvm] Fixes #104875 (PR #107741)
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- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
via llvm-commits
- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
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- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
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- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
via llvm-commits
- [llvm] 4ea6552 - [NFC][TableGen] Migrate LLVM RISCVTarget/VT Emitters to const RecordKeeper (#107697)
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- [lld] dec0781 - [LLD][COFF] Always locate the IAT at the beginning of the .rdata section and align its size to 4KB on ARM64EC. (#107588)
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- [llvm] [LineEditor] Flush the output stream after printing the prompt (PR #107755)
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- [llvm] [LineEditor] Flush the output stream after printing the prompt (PR #107755)
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- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
via llvm-commits
- [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)
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- [llvm] [Hexagon] Avoid repeated hash lookups (NFC) (PR #107760)
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- [llvm] [NFC][TableGen] Replace DefInit::get() with Record::getDefInit() (PR #107762)
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- [llvm] [LTO] Simplify calculateCallGraphRoot (NFC) (PR #107765)
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- [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
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- [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
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- [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
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- [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
via llvm-commits
- [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)
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- [llvm] f5b7c10 - [Hexagon] Avoid repeated hash lookups (NFC) (#107760)
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- [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
via llvm-commits
- [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Prefer to use Vector Truncate (PR #105692)
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- [llvm] ce3c58e - [NFC][TableGen] Replace DefInit::get() with Record::getDefInit() (#107762)
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- [llvm] 8ae5521 - [TableGen] Migrate CTags/DFA/Directive Emitters to const RecordKeeper (#107693)
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- [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
via llvm-commits
- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
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- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
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- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
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- [llvm] [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (PR #107776)
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- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
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- [llvm] 9ade4e2 - [NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF (#106193)
via llvm-commits
- [lld] [lld][WebAssembly] Fix used of uninitialized stack data with -wasm64 (PR #107780)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
via llvm-commits
- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
via llvm-commits
- [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)
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- [llvm] 1cc4c87 - Revert "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (#107788)
via llvm-commits
- [lld] [llvm] Revert "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107788)
via llvm-commits
- [lld] [llvm] Revert "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107788)
via llvm-commits
- [lld] [llvm] Revert "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107788)
via llvm-commits
- [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [VPlan] Implment VPReductionRecipe::computeCost(). NFC (PR #107790)
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- [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)
via llvm-commits
- [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)
via llvm-commits
- [llvm] fef84c5 - [RISCV] Support the large code model. (#70308)
via llvm-commits
- [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #107794)
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- [llvm] [Float2Int] Avoid repeated hash lookups (NFC) (PR #107795)
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- [llvm] [IPO] Avoid repeated hash lookups (NFC) (PR #107796)
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- [llvm] [StructurizeCFG] Avoid repeated hash lookups (NFC) (PR #107797)
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- [llvm] [Mips] Add test file for 'xor' and 'and' instructions (PR #106679)
via llvm-commits
- [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)
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- [llvm] [llvm][Support] Determine the max thread length on Haiku (PR #107801)
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- [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)
via llvm-commits
- [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)
via llvm-commits
- [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)
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- [llvm] [RISCV][MachineCombiner] Combine `fadd X, (fneg Y)` to `fsub X, Y` (PR #107803)
via llvm-commits
- [llvm] 8694353 - [LLVM]Fix symbol visibility macros not being define for AIX (#107705)
via llvm-commits
- [llvm] f2b7149 - [MC] Make MCRegisterInfo::getLLVMRegNum return std::optional<MCRegister>. NFC (#107776)
via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [llvm] 65dc53b - [RISCV] Rematerialize vmv.v.i (#107550)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [SandboxIR][Bench] Fix build (PR #107699)
via llvm-commits
- [llvm] [SandboxIR][Bench] Fix build (PR #107699)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] [Triple] Make mipsel-*-windows-* use COFF files by default (PR #107809)
via llvm-commits
- [llvm] [Triple] Make mipsel-*-windows-* use COFF files by default (PR #107809)
via llvm-commits
- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
via llvm-commits
- [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)
via llvm-commits
- [llvm] ac93554 - Refine the examples in the debug info document (#86272)
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- [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)
via llvm-commits
- [llvm] e17a39b - [Clang] C++20 Coroutines: Introduce Frontend Attribute [[clang::coro_await_elidable]] (#99282)
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- [llvm] 234cc81 - [LLVM][Coroutines] Create `.noalloc` variant of switch ABI coroutine ramp functions during CoroSplit (#99283)
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- [llvm] a416267 - [LLVM][Coroutines] Transform "coro_elide_safe" calls to switch ABI coroutines to the `noalloc` variant (#99285)
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- [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)
via llvm-commits
- [llvm] [COFF] Add MIPS relocation types (PR #107814)
via llvm-commits
- [llvm] [COFF] Add MIPS relocation types (PR #107814)
via llvm-commits
- [llvm] [COFF] Add MIPS relocation types (PR #107814)
via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)
weiwei chen via llvm-commits
- [llvm] [PowerPC] Utilize `getReservedRegs` to find asm clobberable registers. (PR #99766)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Utilize `getReservedRegs` to find asm clobberable registers. (PR #99766)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Utilize `getReservedRegs` to find asm clobberable registers. (PR #99766)
zhijian lin via llvm-commits
- [llvm] [PPC]Optimize zeroing accumulator and spilling instructions into simple instructions (PR #96094)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Utilize `getReservedRegs` to find asm clobberable registers. (PR #99766)
zhijian lin via llvm-commits
Last message date:
Sun Sep 8 23:50:54 PDT 2024
Archived on: Sun Sep 8 23:50:56 PDT 2024
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