[llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)

[David Green via llvm-commits]

davemgreen wrote:

I do believe xor_int64_ff0000ff0000ffff is correct now. My worry is that that might mean that cases that are legal to fold would not any more, and possibly not fix cases that should be blocked. Something like `(v4i32 bitcast (v16i8 regcast (v8i16 vmovimm)))`.

Can you either remove that while loop, or maybe change it to something like:
```
  // We may have a bitcast of something that has already had this bitcast
  // combine performed on it, so skip past any VECTOR_REG_CASTs.
  if (Src.getOpcode() == ARMISD::VECTOR_REG_CAST &&
      Src.getOperand(0).getValueType().getScalarSizeInBits() <=
          Src.getValueType().getScalarSizeInBits())
    Src = Src.getOperand(0);
```

https://github.com/llvm/llvm-project/pull/105519