[llvm] [RISCV][MI] Support partial spill/reload for vector registers (PR #105661)

[Pengcheng Wang via llvm-commits]

wangpc-pp wrote:

> Just an idea, but in #107446 there are subregisters added for GPR which reduces the spill size. Can we do the same for VR and add subregisters for fractional LMULs? Would that help with the spills?

I have a rough try before, I don't remember the details now but I met a problem that the root cause is because we can't use the high part of fractional registers, which is like X86‘s. The subreg indexes should be modeled separately.

https://github.com/llvm/llvm-project/pull/105661