[llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)

[Aditi Medhane via llvm-commits]

https://github.com/AditiRM created https://github.com/llvm/llvm-project/pull/106960

Move the AMDGPU target specific testcases in MachineVerifier separately into new directory.

>From 62ec5c8e888c257579c47f4c0411517eea054479 Mon Sep 17 00:00:00 2001
From: AditiRM <Aditi.Medhane at amd.com>
Date: Mon, 2 Sep 2024 15:03:08 +0530
Subject: [PATCH] [AMDGPU] Create dir for amdgpu specific machineverifier tests

---
 .../MachineVerifier/{ => amdgpu}/register-killed-inside-loop.mir  | 0
 llvm/test/MachineVerifier/{ => amdgpu}/test_g_bitcast.mir         | 0
 llvm/test/MachineVerifier/{ => amdgpu}/test_g_intrinsic.mir       | 0
 .../{ => amdgpu}/test_g_intrinsic_w_side_effects.mir              | 0
 .../{ => amdgpu}/undef-should-only-be-set-on-subreg-defs.mir      | 0
 .../MachineVerifier/{ => amdgpu}/undef-virt-reg-entry-block.mir   | 0
 .../{ => amdgpu}/undef-virt-reg-nonentry-block.mir                | 0
 .../MachineVerifier/{ => amdgpu}/verifier-ec-subreg-liveness.mir  | 0
 .../verifier-implicit-virtreg-invalid-physreg-liveness.mir        | 0
 .../MachineVerifier/{ => amdgpu}/verifier-pseudo-terminators.mir  | 0
 llvm/test/MachineVerifier/{ => amdgpu}/verify-implicit-def.mir    | 0
 llvm/test/MachineVerifier/{ => amdgpu}/verify-reg-sequence.mir    | 0
 llvm/test/MachineVerifier/{ => amdgpu}/writelane_m0.mir           | 0
 13 files changed, 0 insertions(+), 0 deletions(-)
 rename llvm/test/MachineVerifier/{ => amdgpu}/register-killed-inside-loop.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/test_g_bitcast.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/test_g_intrinsic.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/test_g_intrinsic_w_side_effects.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/undef-should-only-be-set-on-subreg-defs.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/undef-virt-reg-entry-block.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/undef-virt-reg-nonentry-block.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/verifier-ec-subreg-liveness.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/verifier-implicit-virtreg-invalid-physreg-liveness.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/verifier-pseudo-terminators.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/verify-implicit-def.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/verify-reg-sequence.mir (100%)
 rename llvm/test/MachineVerifier/{ => amdgpu}/writelane_m0.mir (100%)

diff --git a/llvm/test/MachineVerifier/register-killed-inside-loop.mir b/llvm/test/MachineVerifier/amdgpu/register-killed-inside-loop.mir
similarity index 100%
rename from llvm/test/MachineVerifier/register-killed-inside-loop.mir
rename to llvm/test/MachineVerifier/amdgpu/register-killed-inside-loop.mir
diff --git a/llvm/test/MachineVerifier/test_g_bitcast.mir b/llvm/test/MachineVerifier/amdgpu/test_g_bitcast.mir
similarity index 100%
rename from llvm/test/MachineVerifier/test_g_bitcast.mir
rename to llvm/test/MachineVerifier/amdgpu/test_g_bitcast.mir
diff --git a/llvm/test/MachineVerifier/test_g_intrinsic.mir b/llvm/test/MachineVerifier/amdgpu/test_g_intrinsic.mir
similarity index 100%
rename from llvm/test/MachineVerifier/test_g_intrinsic.mir
rename to llvm/test/MachineVerifier/amdgpu/test_g_intrinsic.mir
diff --git a/llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir b/llvm/test/MachineVerifier/amdgpu/test_g_intrinsic_w_side_effects.mir
similarity index 100%
rename from llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
rename to llvm/test/MachineVerifier/amdgpu/test_g_intrinsic_w_side_effects.mir
diff --git a/llvm/test/MachineVerifier/undef-should-only-be-set-on-subreg-defs.mir b/llvm/test/MachineVerifier/amdgpu/undef-should-only-be-set-on-subreg-defs.mir
similarity index 100%
rename from llvm/test/MachineVerifier/undef-should-only-be-set-on-subreg-defs.mir
rename to llvm/test/MachineVerifier/amdgpu/undef-should-only-be-set-on-subreg-defs.mir
diff --git a/llvm/test/MachineVerifier/undef-virt-reg-entry-block.mir b/llvm/test/MachineVerifier/amdgpu/undef-virt-reg-entry-block.mir
similarity index 100%
rename from llvm/test/MachineVerifier/undef-virt-reg-entry-block.mir
rename to llvm/test/MachineVerifier/amdgpu/undef-virt-reg-entry-block.mir
diff --git a/llvm/test/MachineVerifier/undef-virt-reg-nonentry-block.mir b/llvm/test/MachineVerifier/amdgpu/undef-virt-reg-nonentry-block.mir
similarity index 100%
rename from llvm/test/MachineVerifier/undef-virt-reg-nonentry-block.mir
rename to llvm/test/MachineVerifier/amdgpu/undef-virt-reg-nonentry-block.mir
diff --git a/llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir b/llvm/test/MachineVerifier/amdgpu/verifier-ec-subreg-liveness.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir
rename to llvm/test/MachineVerifier/amdgpu/verifier-ec-subreg-liveness.mir
diff --git a/llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir b/llvm/test/MachineVerifier/amdgpu/verifier-implicit-virtreg-invalid-physreg-liveness.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
rename to llvm/test/MachineVerifier/amdgpu/verifier-implicit-virtreg-invalid-physreg-liveness.mir
diff --git a/llvm/test/MachineVerifier/verifier-pseudo-terminators.mir b/llvm/test/MachineVerifier/amdgpu/verifier-pseudo-terminators.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
rename to llvm/test/MachineVerifier/amdgpu/verifier-pseudo-terminators.mir
diff --git a/llvm/test/MachineVerifier/verify-implicit-def.mir b/llvm/test/MachineVerifier/amdgpu/verify-implicit-def.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verify-implicit-def.mir
rename to llvm/test/MachineVerifier/amdgpu/verify-implicit-def.mir
diff --git a/llvm/test/MachineVerifier/verify-reg-sequence.mir b/llvm/test/MachineVerifier/amdgpu/verify-reg-sequence.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verify-reg-sequence.mir
rename to llvm/test/MachineVerifier/amdgpu/verify-reg-sequence.mir
diff --git a/llvm/test/MachineVerifier/writelane_m0.mir b/llvm/test/MachineVerifier/amdgpu/writelane_m0.mir
similarity index 100%
rename from llvm/test/MachineVerifier/writelane_m0.mir
rename to llvm/test/MachineVerifier/amdgpu/writelane_m0.mir