[llvm] [RISCV] Select zero splats of EEW=64 on RV32 (PR #107205)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 4 12:12:27 PDT 2024
================
@@ -3452,10 +3452,37 @@ bool RISCVDAGToDAGISel::selectVSplat(SDValue N, SDValue &SplatVal) {
return true;
}
+// Look for splats of zero. On RV32 a EEW=64 there may be a bitcast in between.
+//
+// t72: nxv16i32 = RISCVISD::VMV_V_X_VL ...
+// t73: v32i32 = extract_subvector t72, Constant:i32<0>
+// t21: v16i64 = bitcast t73
+// t42: nxv8i64 = insert_subvector undef:nxv8i64, t21, Constant:i32<0>
+static bool isZeroSplat(SDValue N) {
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topperc wrote:
Proposed patch https://github.com/llvm/llvm-project/pull/107290
https://github.com/llvm/llvm-project/pull/107205
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