[llvm] [RISCV] Rename `vcix_state` register to `sf_vcix_state`. NFC (PR #106995)

[Kito Cheng via llvm-commits]

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@@ -664,5 +664,5 @@ def FRM    : RISCVReg<0, "frm">;
 // Shadow Stack register
 def SSP    : RISCVReg<0, "ssp">;
 
-// Dummy VCIX state register
-def VCIX_STATE : RISCVReg<0, "vcix_state">;
+// Dummy SiFive VCIX state register
+def SF_VCIX_STATE : RISCVReg<0, "sf_vcix_state">;
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kito-cheng wrote:

wait, so why `sf_vcix_state` rather than `sf.vcix_state` here?
https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/56

https://github.com/llvm/llvm-project/pull/106995