[llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)

[Igor Kirillov via llvm-commits]

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@@ -2493,6 +2494,91 @@ bool VectorCombine::foldSelectShuffle(Instruction &I, bool FromReduction) {
   return true;
 }
 
+/// Check if instruction depends on ZExt and this ZExt can be moved after the
+/// instruction. Move ZExt if it is profitable
+bool VectorCombine::shrinkType(llvm::Instruction &I) {
+  Value *ZExted, *OtherOperand;
+  if (!match(&I, m_c_BitwiseLogic(m_ZExt(m_Value(ZExted)),
+                                  m_Value(OtherOperand))) &&
+      !match(&I, m_LShr(m_ZExt(m_Value(ZExted)), m_Value(OtherOperand))))
+    return false;
+
+  Instruction *ZExtOperand =
+      cast<Instruction>(I.getOperand(I.getOperand(0) == OtherOperand ? 1 : 0));
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igogo-x86 wrote:

Agreed. We don't need to cast into instruction, though, so it now looks a bit less scary :) I grepped through the LLVM and found some examples of the same code, so we are not the first who face this problem

https://github.com/llvm/llvm-project/pull/104606