[llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)
YANG Xudong via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 8 23:47:30 PDT 2024
https://github.com/yxd-ym updated https://github.com/llvm/llvm-project/pull/107791
>From d258ec376ddf4855c95a37d18f0969d4e1435ea1 Mon Sep 17 00:00:00 2001
From: YANG Xudong <yangxudong at ymatrix.cn>
Date: Sun, 8 Sep 2024 17:47:18 +0800
Subject: [PATCH 1/7] handle FREEZE in PromoteFloatResult
---
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index b5c80005a0ecc1..51357dad5b30ec 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -2655,6 +2655,7 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
case ISD::FLOG10:
case ISD::FNEARBYINT:
case ISD::FNEG:
+ case ISD::FREEZE:
case ISD::FRINT:
case ISD::FROUND:
case ISD::FROUNDEVEN:
>From e4b50bc35fe43a1e443ab65408872dbe5b3d7b0b Mon Sep 17 00:00:00 2001
From: YANG Xudong <yangxudong at ymatrix.cn>
Date: Sun, 8 Sep 2024 17:47:54 +0800
Subject: [PATCH 2/7] add fp16-promote test for loongarch
---
llvm/test/CodeGen/LoongArch/fp16-promote.ll | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/llvm/test/CodeGen/LoongArch/fp16-promote.ll b/llvm/test/CodeGen/LoongArch/fp16-promote.ll
index 75f920b43a06ce..a139428f2d61e9 100644
--- a/llvm/test/CodeGen/LoongArch/fp16-promote.ll
+++ b/llvm/test/CodeGen/LoongArch/fp16-promote.ll
@@ -324,3 +324,18 @@ define void @test_fmul_mem(ptr %p, ptr %q) nounwind {
store half %r, ptr %p
ret void
}
+
+define half @freeze_half() nounwind {
+; LA32-LABEL: freeze_half:
+; LA32: # %bb.0:
+; LA32-NEXT: fadd.s $fa0, $fa0, $fa0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: freeze_half:
+; LA64: # %bb.0:
+; LA64-NEXT: fadd.s $fa0, $fa0, $fa0
+; LA64-NEXT: ret
+ %y1 = freeze half undef
+ %t1 = fadd half %y1, %y1
+ ret half %t1
+}
>From 28d82573c1ac0214792deebc6129f9dee6882dfa Mon Sep 17 00:00:00 2001
From: YANG Xudong <yangxudong at ymatrix.cn>
Date: Mon, 9 Sep 2024 13:04:30 +0800
Subject: [PATCH 3/7] revert FREEZE handling
---
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index 51357dad5b30ec..b5c80005a0ecc1 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -2655,7 +2655,6 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
case ISD::FLOG10:
case ISD::FNEARBYINT:
case ISD::FNEG:
- case ISD::FREEZE:
case ISD::FRINT:
case ISD::FROUND:
case ISD::FROUNDEVEN:
>From d0605d7080c6456b8206b45c3918f433a38e1c07 Mon Sep 17 00:00:00 2001
From: YANG Xudong <yangxudong at ymatrix.cn>
Date: Mon, 9 Sep 2024 13:05:11 +0800
Subject: [PATCH 4/7] use softPromoteHalfType
---
llvm/lib/Target/LoongArch/LoongArchISelLowering.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index 9723789e919b15..6177884bd19501 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -337,6 +337,8 @@ class LoongArchTargetLowering : public TargetLowering {
bool isEligibleForTailCallOptimization(
CCState &CCInfo, CallLoweringInfo &CLI, MachineFunction &MF,
const SmallVectorImpl<CCValAssign> &ArgLocs) const;
+
+ bool softPromoteHalfType() const override { return true; }
};
} // end namespace llvm
>From efed380ce5000ef37ee7a8bb5fcc08b3915c62e9 Mon Sep 17 00:00:00 2001
From: YANG Xudong <yangxudong at ymatrix.cn>
Date: Mon, 9 Sep 2024 13:36:54 +0800
Subject: [PATCH 5/7] use fp regs
---
llvm/lib/Target/LoongArch/LoongArchISelLowering.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index 6177884bd19501..e05996ad4ff0c3 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -339,6 +339,8 @@ class LoongArchTargetLowering : public TargetLowering {
const SmallVectorImpl<CCValAssign> &ArgLocs) const;
bool softPromoteHalfType() const override { return true; }
+
+ bool useFPRegsForHalfType() const override { return true; }
};
} // end namespace llvm
>From 834bff369f8f24e69523ca01f06376b35ccd7c52 Mon Sep 17 00:00:00 2001
From: YANG Xudong <yangxudong at ymatrix.cn>
Date: Mon, 9 Sep 2024 13:55:41 +0800
Subject: [PATCH 6/7] do not use fp regs
---
llvm/lib/Target/LoongArch/LoongArchISelLowering.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index e05996ad4ff0c3..6177884bd19501 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -339,8 +339,6 @@ class LoongArchTargetLowering : public TargetLowering {
const SmallVectorImpl<CCValAssign> &ArgLocs) const;
bool softPromoteHalfType() const override { return true; }
-
- bool useFPRegsForHalfType() const override { return true; }
};
} // end namespace llvm
>From 82812a9f02daf71cf2e09c71931cdd2e8c984b35 Mon Sep 17 00:00:00 2001
From: YANG Xudong <yangxudong at ymatrix.cn>
Date: Mon, 9 Sep 2024 14:44:04 +0800
Subject: [PATCH 7/7] fix tests
---
llvm/test/CodeGen/LoongArch/fp16-promote.ll | 160 +++++++++++---------
1 file changed, 86 insertions(+), 74 deletions(-)
diff --git a/llvm/test/CodeGen/LoongArch/fp16-promote.ll b/llvm/test/CodeGen/LoongArch/fp16-promote.ll
index a139428f2d61e9..9ad6c3177d0f12 100644
--- a/llvm/test/CodeGen/LoongArch/fp16-promote.ll
+++ b/llvm/test/CodeGen/LoongArch/fp16-promote.ll
@@ -126,42 +126,40 @@ define void @test_fptrunc_double(double %d, ptr %p) nounwind {
define half @test_fadd_reg(half %a, half %b) nounwind {
; LA32-LABEL: test_fadd_reg:
; LA32: # %bb.0:
-; LA32-NEXT: addi.w $sp, $sp, -32
-; LA32-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
-; LA32-NEXT: fst.d $fs0, $sp, 16 # 8-byte Folded Spill
-; LA32-NEXT: fst.d $fs1, $sp, 8 # 8-byte Folded Spill
+; LA32-NEXT: addi.w $sp, $sp, -16
+; LA32-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-NEXT: st.w $fp, $sp, 8 # 4-byte Folded Spill
+; LA32-NEXT: fst.d $fs0, $sp, 0 # 8-byte Folded Spill
+; LA32-NEXT: move $fp, $a0
+; LA32-NEXT: move $a0, $a1
+; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
; LA32-NEXT: fmov.s $fs0, $fa0
-; LA32-NEXT: fmov.s $fa0, $fa1
-; LA32-NEXT: bl %plt(__gnu_f2h_ieee)
+; LA32-NEXT: move $a0, $fp
; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA32-NEXT: fmov.s $fs1, $fa0
-; LA32-NEXT: fmov.s $fa0, $fs0
+; LA32-NEXT: fadd.s $fa0, $fa0, $fs0
; LA32-NEXT: bl %plt(__gnu_f2h_ieee)
-; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA32-NEXT: fadd.s $fa0, $fa0, $fs1
-; LA32-NEXT: fld.d $fs1, $sp, 8 # 8-byte Folded Reload
-; LA32-NEXT: fld.d $fs0, $sp, 16 # 8-byte Folded Reload
-; LA32-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
-; LA32-NEXT: addi.w $sp, $sp, 32
+; LA32-NEXT: fld.d $fs0, $sp, 0 # 8-byte Folded Reload
+; LA32-NEXT: ld.w $fp, $sp, 8 # 4-byte Folded Reload
+; LA32-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-NEXT: addi.w $sp, $sp, 16
; LA32-NEXT: ret
;
; LA64-LABEL: test_fadd_reg:
; LA64: # %bb.0:
; LA64-NEXT: addi.d $sp, $sp, -32
; LA64-NEXT: st.d $ra, $sp, 24 # 8-byte Folded Spill
-; LA64-NEXT: fst.d $fs0, $sp, 16 # 8-byte Folded Spill
-; LA64-NEXT: fst.d $fs1, $sp, 8 # 8-byte Folded Spill
+; LA64-NEXT: st.d $fp, $sp, 16 # 8-byte Folded Spill
+; LA64-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
+; LA64-NEXT: move $fp, $a0
+; LA64-NEXT: move $a0, $a1
+; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
; LA64-NEXT: fmov.s $fs0, $fa0
-; LA64-NEXT: fmov.s $fa0, $fa1
-; LA64-NEXT: bl %plt(__gnu_f2h_ieee)
+; LA64-NEXT: move $a0, $fp
; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA64-NEXT: fmov.s $fs1, $fa0
-; LA64-NEXT: fmov.s $fa0, $fs0
+; LA64-NEXT: fadd.s $fa0, $fa0, $fs0
; LA64-NEXT: bl %plt(__gnu_f2h_ieee)
-; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA64-NEXT: fadd.s $fa0, $fa0, $fs1
-; LA64-NEXT: fld.d $fs1, $sp, 8 # 8-byte Folded Reload
-; LA64-NEXT: fld.d $fs0, $sp, 16 # 8-byte Folded Reload
+; LA64-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
; LA64-NEXT: ld.d $ra, $sp, 24 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 32
; LA64-NEXT: ret
@@ -177,16 +175,16 @@ define void @test_fadd_mem(ptr %p, ptr %q) nounwind {
; LA32-NEXT: st.w $fp, $sp, 24 # 4-byte Folded Spill
; LA32-NEXT: st.w $s0, $sp, 20 # 4-byte Folded Spill
; LA32-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
-; LA32-NEXT: move $fp, $a1
-; LA32-NEXT: move $s0, $a0
-; LA32-NEXT: ld.hu $a0, $a0, 0
+; LA32-NEXT: move $fp, $a0
+; LA32-NEXT: ld.hu $s0, $a0, 0
+; LA32-NEXT: ld.hu $a0, $a1, 0
; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
; LA32-NEXT: fmov.s $fs0, $fa0
-; LA32-NEXT: ld.hu $a0, $fp, 0
+; LA32-NEXT: move $a0, $s0
; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA32-NEXT: fadd.s $fa0, $fs0, $fa0
+; LA32-NEXT: fadd.s $fa0, $fa0, $fs0
; LA32-NEXT: bl %plt(__gnu_f2h_ieee)
-; LA32-NEXT: st.h $a0, $s0, 0
+; LA32-NEXT: st.h $a0, $fp, 0
; LA32-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
; LA32-NEXT: ld.w $s0, $sp, 20 # 4-byte Folded Reload
; LA32-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
@@ -201,16 +199,16 @@ define void @test_fadd_mem(ptr %p, ptr %q) nounwind {
; LA64-NEXT: st.d $fp, $sp, 16 # 8-byte Folded Spill
; LA64-NEXT: st.d $s0, $sp, 8 # 8-byte Folded Spill
; LA64-NEXT: fst.d $fs0, $sp, 0 # 8-byte Folded Spill
-; LA64-NEXT: move $fp, $a1
-; LA64-NEXT: move $s0, $a0
-; LA64-NEXT: ld.hu $a0, $a0, 0
+; LA64-NEXT: move $fp, $a0
+; LA64-NEXT: ld.hu $s0, $a0, 0
+; LA64-NEXT: ld.hu $a0, $a1, 0
; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
; LA64-NEXT: fmov.s $fs0, $fa0
-; LA64-NEXT: ld.hu $a0, $fp, 0
+; LA64-NEXT: move $a0, $s0
; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA64-NEXT: fadd.s $fa0, $fs0, $fa0
+; LA64-NEXT: fadd.s $fa0, $fa0, $fs0
; LA64-NEXT: bl %plt(__gnu_f2h_ieee)
-; LA64-NEXT: st.h $a0, $s0, 0
+; LA64-NEXT: st.h $a0, $fp, 0
; LA64-NEXT: fld.d $fs0, $sp, 0 # 8-byte Folded Reload
; LA64-NEXT: ld.d $s0, $sp, 8 # 8-byte Folded Reload
; LA64-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
@@ -227,42 +225,40 @@ define void @test_fadd_mem(ptr %p, ptr %q) nounwind {
define half @test_fmul_reg(half %a, half %b) nounwind {
; LA32-LABEL: test_fmul_reg:
; LA32: # %bb.0:
-; LA32-NEXT: addi.w $sp, $sp, -32
-; LA32-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
-; LA32-NEXT: fst.d $fs0, $sp, 16 # 8-byte Folded Spill
-; LA32-NEXT: fst.d $fs1, $sp, 8 # 8-byte Folded Spill
+; LA32-NEXT: addi.w $sp, $sp, -16
+; LA32-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-NEXT: st.w $fp, $sp, 8 # 4-byte Folded Spill
+; LA32-NEXT: fst.d $fs0, $sp, 0 # 8-byte Folded Spill
+; LA32-NEXT: move $fp, $a0
+; LA32-NEXT: move $a0, $a1
+; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
; LA32-NEXT: fmov.s $fs0, $fa0
-; LA32-NEXT: fmov.s $fa0, $fa1
-; LA32-NEXT: bl %plt(__gnu_f2h_ieee)
+; LA32-NEXT: move $a0, $fp
; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA32-NEXT: fmov.s $fs1, $fa0
-; LA32-NEXT: fmov.s $fa0, $fs0
+; LA32-NEXT: fmul.s $fa0, $fa0, $fs0
; LA32-NEXT: bl %plt(__gnu_f2h_ieee)
-; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA32-NEXT: fmul.s $fa0, $fa0, $fs1
-; LA32-NEXT: fld.d $fs1, $sp, 8 # 8-byte Folded Reload
-; LA32-NEXT: fld.d $fs0, $sp, 16 # 8-byte Folded Reload
-; LA32-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
-; LA32-NEXT: addi.w $sp, $sp, 32
+; LA32-NEXT: fld.d $fs0, $sp, 0 # 8-byte Folded Reload
+; LA32-NEXT: ld.w $fp, $sp, 8 # 4-byte Folded Reload
+; LA32-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-NEXT: addi.w $sp, $sp, 16
; LA32-NEXT: ret
;
; LA64-LABEL: test_fmul_reg:
; LA64: # %bb.0:
; LA64-NEXT: addi.d $sp, $sp, -32
; LA64-NEXT: st.d $ra, $sp, 24 # 8-byte Folded Spill
-; LA64-NEXT: fst.d $fs0, $sp, 16 # 8-byte Folded Spill
-; LA64-NEXT: fst.d $fs1, $sp, 8 # 8-byte Folded Spill
+; LA64-NEXT: st.d $fp, $sp, 16 # 8-byte Folded Spill
+; LA64-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
+; LA64-NEXT: move $fp, $a0
+; LA64-NEXT: move $a0, $a1
+; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
; LA64-NEXT: fmov.s $fs0, $fa0
-; LA64-NEXT: fmov.s $fa0, $fa1
-; LA64-NEXT: bl %plt(__gnu_f2h_ieee)
+; LA64-NEXT: move $a0, $fp
; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA64-NEXT: fmov.s $fs1, $fa0
-; LA64-NEXT: fmov.s $fa0, $fs0
+; LA64-NEXT: fmul.s $fa0, $fa0, $fs0
; LA64-NEXT: bl %plt(__gnu_f2h_ieee)
-; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA64-NEXT: fmul.s $fa0, $fa0, $fs1
-; LA64-NEXT: fld.d $fs1, $sp, 8 # 8-byte Folded Reload
-; LA64-NEXT: fld.d $fs0, $sp, 16 # 8-byte Folded Reload
+; LA64-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
+; LA64-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
; LA64-NEXT: ld.d $ra, $sp, 24 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 32
; LA64-NEXT: ret
@@ -278,16 +274,16 @@ define void @test_fmul_mem(ptr %p, ptr %q) nounwind {
; LA32-NEXT: st.w $fp, $sp, 24 # 4-byte Folded Spill
; LA32-NEXT: st.w $s0, $sp, 20 # 4-byte Folded Spill
; LA32-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
-; LA32-NEXT: move $fp, $a1
-; LA32-NEXT: move $s0, $a0
-; LA32-NEXT: ld.hu $a0, $a0, 0
+; LA32-NEXT: move $fp, $a0
+; LA32-NEXT: ld.hu $s0, $a0, 0
+; LA32-NEXT: ld.hu $a0, $a1, 0
; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
; LA32-NEXT: fmov.s $fs0, $fa0
-; LA32-NEXT: ld.hu $a0, $fp, 0
+; LA32-NEXT: move $a0, $s0
; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA32-NEXT: fmul.s $fa0, $fs0, $fa0
+; LA32-NEXT: fmul.s $fa0, $fa0, $fs0
; LA32-NEXT: bl %plt(__gnu_f2h_ieee)
-; LA32-NEXT: st.h $a0, $s0, 0
+; LA32-NEXT: st.h $a0, $fp, 0
; LA32-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
; LA32-NEXT: ld.w $s0, $sp, 20 # 4-byte Folded Reload
; LA32-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
@@ -302,16 +298,16 @@ define void @test_fmul_mem(ptr %p, ptr %q) nounwind {
; LA64-NEXT: st.d $fp, $sp, 16 # 8-byte Folded Spill
; LA64-NEXT: st.d $s0, $sp, 8 # 8-byte Folded Spill
; LA64-NEXT: fst.d $fs0, $sp, 0 # 8-byte Folded Spill
-; LA64-NEXT: move $fp, $a1
-; LA64-NEXT: move $s0, $a0
-; LA64-NEXT: ld.hu $a0, $a0, 0
+; LA64-NEXT: move $fp, $a0
+; LA64-NEXT: ld.hu $s0, $a0, 0
+; LA64-NEXT: ld.hu $a0, $a1, 0
; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
; LA64-NEXT: fmov.s $fs0, $fa0
-; LA64-NEXT: ld.hu $a0, $fp, 0
+; LA64-NEXT: move $a0, $s0
; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
-; LA64-NEXT: fmul.s $fa0, $fs0, $fa0
+; LA64-NEXT: fmul.s $fa0, $fa0, $fs0
; LA64-NEXT: bl %plt(__gnu_f2h_ieee)
-; LA64-NEXT: st.h $a0, $s0, 0
+; LA64-NEXT: st.h $a0, $fp, 0
; LA64-NEXT: fld.d $fs0, $sp, 0 # 8-byte Folded Reload
; LA64-NEXT: ld.d $s0, $sp, 8 # 8-byte Folded Reload
; LA64-NEXT: ld.d $fp, $sp, 16 # 8-byte Folded Reload
@@ -328,12 +324,28 @@ define void @test_fmul_mem(ptr %p, ptr %q) nounwind {
define half @freeze_half() nounwind {
; LA32-LABEL: freeze_half:
; LA32: # %bb.0:
-; LA32-NEXT: fadd.s $fa0, $fa0, $fa0
+; LA32-NEXT: addi.w $sp, $sp, -16
+; LA32-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-NEXT: movgr2fr.w $fa0, $zero
+; LA32-NEXT: bl %plt(__gnu_f2h_ieee)
+; LA32-NEXT: bl %plt(__gnu_h2f_ieee)
+; LA32-NEXT: fadd.s $fa0, $fa0, $fa0
+; LA32-NEXT: bl %plt(__gnu_f2h_ieee)
+; LA32-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-NEXT: addi.w $sp, $sp, 16
; LA32-NEXT: ret
;
; LA64-LABEL: freeze_half:
; LA64: # %bb.0:
-; LA64-NEXT: fadd.s $fa0, $fa0, $fa0
+; LA64-NEXT: addi.d $sp, $sp, -16
+; LA64-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
+; LA64-NEXT: movgr2fr.w $fa0, $zero
+; LA64-NEXT: bl %plt(__gnu_f2h_ieee)
+; LA64-NEXT: bl %plt(__gnu_h2f_ieee)
+; LA64-NEXT: fadd.s $fa0, $fa0, $fa0
+; LA64-NEXT: bl %plt(__gnu_f2h_ieee)
+; LA64-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
+; LA64-NEXT: addi.d $sp, $sp, 16
; LA64-NEXT: ret
%y1 = freeze half undef
%t1 = fadd half %y1, %y1
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