[llvm] [RISCV] Fold PseudoVMV_V_V with undef passthru, handling policy (PR #106943)
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 4 13:51:57 PDT 2024
================
@@ -472,6 +473,38 @@ bool RISCVVectorPeephole::ensureDominates(const MachineOperand &MO,
return true;
}
+/// If a PseudoVMV_V_V's passthru is undef then we can replace it with its input
+bool RISCVVectorPeephole::foldUndefPassthruVMV_V_V(MachineInstr &MI) {
+ if (RISCV::getRVVMCOpcode(MI.getOpcode()) != RISCV::VMV_V_V)
+ return false;
+ if (MI.getOperand(1).getReg() != RISCV::NoRegister)
+ return false;
+
+ // If the input was a pseudo with a policy operand, we can give it a tail
+ // agnostic policy if MI's undef tail subsumes the input's.
+ MachineInstr *Src = MRI->getVRegDef(MI.getOperand(2).getReg());
+ if (Src && !Src->hasUnmodeledSideEffects() &&
+ MRI->hasOneUse(MI.getOperand(2).getReg()) &&
+ RISCVII::hasVLOp(Src->getDesc().TSFlags) &&
+ RISCVII::hasVecPolicyOp(Src->getDesc().TSFlags) &&
+ getSEWLMULRatio(MI) == getSEWLMULRatio(*Src)) {
+ const MachineOperand &MIVL = MI.getOperand(3);
+ const MachineOperand &SrcVL =
+ Src->getOperand(RISCVII::getVLOpNum(Src->getDesc()));
+
+ MachineOperand &SrcPolicy =
+ Src->getOperand(RISCVII::getVecPolicyOpNum(Src->getDesc()));
+
+ if (isVLKnownLE(MIVL, SrcVL))
+ SrcPolicy.setImm(SrcPolicy.getImm() | RISCVII::TAIL_AGNOSTIC);
+ }
+
+ MRI->replaceRegWith(MI.getOperand(0).getReg(), Src->getOperand(0).getReg());
----------------
preames wrote:
Src may have multiple defs, use MI.getOperand(2).getReg() instead.
https://github.com/llvm/llvm-project/pull/106943
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