[llvm] 058964d - [X86] LowerSELECTWithCmpZero - move "select (X != 0), -1, Y --> 0 - X; or (sbb), Y" fold
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 8 05:35:04 PDT 2024
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Author: Simon Pilgrim
Date: 2024-09-08T12:24:28+01:00
New Revision: 058964d3dacdc1321dcf2fdf82bebd3a37fcbc9c
URL: https://github.com/llvm/llvm-project/commit/058964d3dacdc1321dcf2fdf82bebd3a37fcbc9c
DIFF: https://github.com/llvm/llvm-project/commit/058964d3dacdc1321dcf2fdf82bebd3a37fcbc9c.diff
LOG: [X86] LowerSELECTWithCmpZero - move "select (X != 0), -1, Y --> 0 - X; or (sbb), Y" fold
Move fold into LowerSELECTWithCmpZero so it can be used with (AND X,1) ==/!= 0 select cases
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/cmov-promotion.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b8a6f10cab623d..b9a6eb26fc9fcd 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24139,6 +24139,32 @@ static SDValue LowerSELECTWithCmpZero(SDValue CmpVal, SDValue LHS, SDValue RHS,
}
}
+ if ((X86CC == X86::COND_E || X86CC == X86::COND_NE) &&
+ (isAllOnesConstant(LHS) || isAllOnesConstant(RHS))) {
+ SDValue Y = isAllOnesConstant(RHS) ? LHS : RHS;
+ SDVTList CmpVTs = DAG.getVTList(CmpVT, MVT::i32);
+
+ // 'X - 1' sets the carry flag if X == 0.
+ // '0 - X' sets the carry flag if X != 0.
+ // Convert the carry flag to a -1/0 mask with sbb:
+ // select (X != 0), -1, Y --> 0 - X; or (sbb), Y
+ // select (X == 0), Y, -1 --> 0 - X; or (sbb), Y
+ // select (X != 0), Y, -1 --> X - 1; or (sbb), Y
+ // select (X == 0), -1, Y --> X - 1; or (sbb), Y
+ SDValue Sub;
+ if (isAllOnesConstant(LHS) == (X86CC == X86::COND_NE)) {
+ SDValue Zero = DAG.getConstant(0, DL, CmpVT);
+ Sub = DAG.getNode(X86ISD::SUB, DL, CmpVTs, Zero, CmpVal);
+ } else {
+ SDValue One = DAG.getConstant(1, DL, CmpVT);
+ Sub = DAG.getNode(X86ISD::SUB, DL, CmpVTs, CmpVal, One);
+ }
+ SDValue SBB = DAG.getNode(X86ISD::SETCC_CARRY, DL, VT,
+ DAG.getTargetConstant(X86::COND_B, DL, MVT::i8),
+ Sub.getValue(1));
+ return DAG.getNode(ISD::OR, DL, VT, SBB, Y);
+ }
+
return SDValue();
}
@@ -24262,30 +24288,6 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
((CondCode == X86::COND_NE && MatchFFSMinus1(Op1, Op2)) ||
(CondCode == X86::COND_E && MatchFFSMinus1(Op2, Op1)))) {
// Keep Cmp.
- } else if ((isAllOnesConstant(Op1) || isAllOnesConstant(Op2)) &&
- (CondCode == X86::COND_E || CondCode == X86::COND_NE)) {
- SDValue Y = isAllOnesConstant(Op2) ? Op1 : Op2;
- SDVTList CmpVTs = DAG.getVTList(CmpOp0.getValueType(), MVT::i32);
-
- // 'X - 1' sets the carry flag if X == 0.
- // '0 - X' sets the carry flag if X != 0.
- // Convert the carry flag to a -1/0 mask with sbb:
- // select (X != 0), -1, Y --> 0 - X; or (sbb), Y
- // select (X == 0), Y, -1 --> 0 - X; or (sbb), Y
- // select (X != 0), Y, -1 --> X - 1; or (sbb), Y
- // select (X == 0), -1, Y --> X - 1; or (sbb), Y
- SDValue Sub;
- if (isAllOnesConstant(Op1) == (CondCode == X86::COND_NE)) {
- SDValue Zero = DAG.getConstant(0, DL, CmpOp0.getValueType());
- Sub = DAG.getNode(X86ISD::SUB, DL, CmpVTs, Zero, CmpOp0);
- } else {
- SDValue One = DAG.getConstant(1, DL, CmpOp0.getValueType());
- Sub = DAG.getNode(X86ISD::SUB, DL, CmpVTs, CmpOp0, One);
- }
- SDValue SBB = DAG.getNode(X86ISD::SETCC_CARRY, DL, VT,
- DAG.getTargetConstant(X86::COND_B, DL, MVT::i8),
- Sub.getValue(1));
- return DAG.getNode(ISD::OR, DL, VT, SBB, Y);
} else if (SDValue R = LowerSELECTWithCmpZero(CmpOp0, Op1, Op2, CondCode,
DL, DAG, Subtarget)) {
return R;
diff --git a/llvm/test/CodeGen/X86/cmov-promotion.ll b/llvm/test/CodeGen/X86/cmov-promotion.ll
index e96faa7fbb7e7e..ff84fa4606ea0d 100644
--- a/llvm/test/CodeGen/X86/cmov-promotion.ll
+++ b/llvm/test/CodeGen/X86/cmov-promotion.ll
@@ -251,19 +251,16 @@ define i64 @cmov_spromotion_16_to_64(i1 %c) {
;
; NO_CMOV-LABEL: cmov_spromotion_16_to_64:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: xorl %edx, %edx
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; NO_CMOV-NEXT: andb $1, %cl
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
-; NO_CMOV-NEXT: je .LBB10_1
-; NO_CMOV-NEXT: # %bb.2:
-; NO_CMOV-NEXT: je .LBB10_3
-; NO_CMOV-NEXT: .LBB10_4:
-; NO_CMOV-NEXT: retl
-; NO_CMOV-NEXT: .LBB10_1:
+; NO_CMOV-NEXT: jne .LBB10_2
+; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $-22429, %eax # imm = 0xA863
-; NO_CMOV-NEXT: jne .LBB10_4
-; NO_CMOV-NEXT: .LBB10_3:
-; NO_CMOV-NEXT: movl $-1, %edx
+; NO_CMOV-NEXT: .LBB10_2:
+; NO_CMOV-NEXT: xorl %edx, %edx
+; NO_CMOV-NEXT: cmpb $1, %cl
+; NO_CMOV-NEXT: sbbl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 43107
%ret = sext i16 %t0 to i64
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