[llvm] [RISCV] Remove pre-assignment of mask vectors during call lowering. (PR #107192)

via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 4 00:25:06 PDT 2024


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git-clang-format --diff 06286832db0c4ee1899f9cee1b8f6234e45f16c7 265b76a3b95e4caa977f307fbc04d290b33638b6 --extensions cpp,h -- llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 00e338acec..bc661c72e5 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -19122,8 +19122,7 @@ static bool CC_RISCVAssign2XLen(unsigned XLen, CCState &State, CCValAssign VA1,
   return false;
 }
 
-static MCRegister allocateRVVReg(MVT ValVT, unsigned ValNo,
-                                 CCState &State,
+static MCRegister allocateRVVReg(MVT ValVT, unsigned ValNo, CCState &State,
                                  const RISCVTargetLowering &TLI) {
   const TargetRegisterClass *RC = TLI.getRegClassFor(ValVT);
   if (RC == &RISCV::VRRegClass) {

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https://github.com/llvm/llvm-project/pull/107192


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