[llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 4 13:22:23 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-analysis
Author: Florian Hahn (fhahn)
<details>
<summary>Changes</summary>
Add costs for FP conversions of v3f32. The costs are the same as for v4f32, as the conversions are widened to that type.
---
Full diff: https://github.com/llvm/llvm-project/pull/107303.diff
2 Files Affected:
- (modified) llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (+16)
- (modified) llvm/test/Analysis/CostModel/AArch64/vec3-fp-conversions.ll (+8-8)
``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 58c267f1ce4bd6..9c34afe46228d3 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -2730,9 +2730,11 @@ InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
// LowerVectorINT_TO_FP:
{ ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
+ { ISD::SINT_TO_FP, MVT::v3f32, MVT::v3i32, 1 },
{ ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
{ ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 },
{ ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
+ { ISD::UINT_TO_FP, MVT::v3f32, MVT::v3i32, 1 },
{ ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
{ ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 },
@@ -2744,6 +2746,12 @@ InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
{ ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 },
{ ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 },
+ // Complex: to v3f32
+ { ISD::SINT_TO_FP, MVT::v3f32, MVT::v3i8, 4 },
+ { ISD::SINT_TO_FP, MVT::v3f32, MVT::v3i16, 2 },
+ { ISD::UINT_TO_FP, MVT::v3f32, MVT::v3i8, 3 },
+ { ISD::UINT_TO_FP, MVT::v3f32, MVT::v3i16, 2 },
+
// Complex: to v4f32
{ ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 4 },
{ ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
@@ -2774,9 +2782,11 @@ InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
// LowerVectorFP_TO_INT
{ ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 },
+ { ISD::FP_TO_SINT, MVT::v3i32, MVT::v3f32, 1 },
{ ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 },
{ ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f64, 1 },
{ ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 },
+ { ISD::FP_TO_UINT, MVT::v3i32, MVT::v3f32, 1 },
{ ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 },
{ ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 },
@@ -2788,6 +2798,12 @@ InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
{ ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 },
{ ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 },
+ // Complex, from v3f32: narrowing => ~2
+ { ISD::FP_TO_SINT, MVT::v3i16, MVT::v3f32, 2 },
+ { ISD::FP_TO_SINT, MVT::v3i8, MVT::v3f32, 2 },
+ { ISD::FP_TO_UINT, MVT::v3i16, MVT::v3f32, 2 },
+ { ISD::FP_TO_UINT, MVT::v3i8, MVT::v3f32, 2 },
+
// Complex, from v4f32: legal type is v4i16, 1 narrowing => ~2
{ ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 },
{ ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 2 },
diff --git a/llvm/test/Analysis/CostModel/AArch64/vec3-fp-conversions.ll b/llvm/test/Analysis/CostModel/AArch64/vec3-fp-conversions.ll
index 334c6107eb3832..551c445f8ee038 100644
--- a/llvm/test/Analysis/CostModel/AArch64/vec3-fp-conversions.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/vec3-fp-conversions.ll
@@ -12,7 +12,7 @@ define <3 x i32> @fptoui_v3f32_to_v3i32(<3 x float> %in, ptr %dst) {
define <3 x i16> @fptoui_v3f32_to_v3i16(<3 x float> %in, ptr %dst) {
; CHECK-LABEL: 'fptoui_v3f32_to_v3i16'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %conv = fptoui <3 x float> %in to <3 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %conv = fptoui <3 x float> %in to <3 x i16>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i16> %conv
;
%conv = fptoui <3 x float> %in to <3 x i16>
@@ -21,7 +21,7 @@ define <3 x i16> @fptoui_v3f32_to_v3i16(<3 x float> %in, ptr %dst) {
define <3 x i8> @fptoui_v3f32_to_v3i8(<3 x float> %in, ptr %dst) {
; CHECK-LABEL: 'fptoui_v3f32_to_v3i8'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %conv = fptoui <3 x float> %in to <3 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %conv = fptoui <3 x float> %in to <3 x i8>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i8> %conv
;
%conv = fptoui <3 x float> %in to <3 x i8>
@@ -39,7 +39,7 @@ define <3 x i32> @fptosi_v3f32_to_v3i32(<3 x float> %in, ptr %dst) {
define <3 x i16> @fptosi_v3f32_to_v3i16(<3 x float> %in, ptr %dst) {
; CHECK-LABEL: 'fptosi_v3f32_to_v3i16'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %conv = fptosi <3 x float> %in to <3 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %conv = fptosi <3 x float> %in to <3 x i16>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i16> %conv
;
%conv = fptosi <3 x float> %in to <3 x i16>
@@ -48,7 +48,7 @@ define <3 x i16> @fptosi_v3f32_to_v3i16(<3 x float> %in, ptr %dst) {
define <3 x i8> @fptosi_v3f32_to_v3i8(<3 x float> %in, ptr %dst) {
; CHECK-LABEL: 'fptosi_v3f32_to_v3i8'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %conv = fptosi <3 x float> %in to <3 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %conv = fptosi <3 x float> %in to <3 x i8>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i8> %conv
;
%conv = fptosi <3 x float> %in to <3 x i8>
@@ -66,7 +66,7 @@ define <3 x float> @uitofp_v3i32_to_v3f32(<3 x i32> %in, ptr %dst) {
define <3 x float> @uitofp_v3i16_to_v3f32(<3 x i16> %in, ptr %dst) {
; CHECK-LABEL: 'uitofp_v3i16_to_v3f32'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = uitofp <3 x i16> %in to <3 x float>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %conv = uitofp <3 x i16> %in to <3 x float>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv
;
%conv = uitofp <3 x i16> %in to <3 x float>
@@ -75,7 +75,7 @@ define <3 x float> @uitofp_v3i16_to_v3f32(<3 x i16> %in, ptr %dst) {
define <3 x float> @uitofp_v3i8_to_v3f32(<3 x i8> %in, ptr %dst) {
; CHECK-LABEL: 'uitofp_v3i8_to_v3f32'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = uitofp <3 x i8> %in to <3 x float>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %conv = uitofp <3 x i8> %in to <3 x float>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv
;
%conv = uitofp <3 x i8> %in to <3 x float>
@@ -93,7 +93,7 @@ define <3 x float> @sitofp_v3i32_to_v3f32(<3 x i32> %in, ptr %dst) {
define <3 x float> @sitofp_v3i16_to_v3f32(<3 x i16> %in, ptr %dst) {
; CHECK-LABEL: 'sitofp_v3i16_to_v3f32'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = sitofp <3 x i16> %in to <3 x float>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %conv = sitofp <3 x i16> %in to <3 x float>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv
;
%conv = sitofp <3 x i16> %in to <3 x float>
@@ -102,7 +102,7 @@ define <3 x float> @sitofp_v3i16_to_v3f32(<3 x i16> %in, ptr %dst) {
define <3 x float> @sitofp_v3i8_to_v3f32(<3 x i8> %in, ptr %dst) {
; CHECK-LABEL: 'sitofp_v3i8_to_v3f32'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = sitofp <3 x i8> %in to <3 x float>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %conv = sitofp <3 x i8> %in to <3 x float>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv
;
%conv = sitofp <3 x i8> %in to <3 x float>
``````````
</details>
https://github.com/llvm/llvm-project/pull/107303
More information about the llvm-commits
mailing list