[llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)

[Andrew Ng via llvm-commits]

https://github.com/nga888 created https://github.com/llvm/llvm-project/pull/107618

Fixes #54773

>From 4aa238e36efca2793bce1f1ec792045b90c9368c Mon Sep 17 00:00:00 2001
From: Andrew Ng <andrew.ng at sony.com>
Date: Fri, 6 Sep 2024 18:02:43 +0100
Subject: [PATCH] [llvm-ml] Fix RIP-relative addressing for ptr operands

Fixes #54773
---
 llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp      | 2 +-
 llvm/test/tools/llvm-ml/rip_relative_addressing.asm | 8 +++++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 03f49306c2b7b5..e88dc9cfbf4877 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -2707,7 +2707,7 @@ bool X86AsmParser::parseIntelOperand(OperandVector &Operands, StringRef Name) {
   bool MaybeDirectBranchDest = true;
 
   if (Parser.isParsingMasm()) {
-    if (is64BitMode() && SM.getElementSize() > 0) {
+    if (is64BitMode() && (PtrInOperand || SM.getElementSize() > 0)) {
       DefaultBaseReg = X86::RIP;
     }
     if (IsUnconditionalBranch) {
diff --git a/llvm/test/tools/llvm-ml/rip_relative_addressing.asm b/llvm/test/tools/llvm-ml/rip_relative_addressing.asm
index d237e84435b7d6..cdd984ee6a8522 100644
--- a/llvm/test/tools/llvm-ml/rip_relative_addressing.asm
+++ b/llvm/test/tools/llvm-ml/rip_relative_addressing.asm
@@ -53,4 +53,10 @@ mov eax, [t8]
 ; CHECK-LABEL: t8:
 ; CHECK: mov eax, dword ptr [t8]
 
-END
\ No newline at end of file
+t9:
+mov eax, dword ptr [bar]
+; CHECK-LABEL: t9:
+; CHECK-32: mov eax, dword ptr [bar]
+; CHECK-64: mov eax, dword ptr [rip + bar]
+
+END