[llvm] eae1d61 - [X86] Add test coverage for #107289

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2024-09-05T14:35:22+01:00
New Revision: eae1d6152fd77511f943fd7f300a971c53453e70

URL: https://github.com/llvm/llvm-project/commit/eae1d6152fd77511f943fd7f300a971c53453e70
DIFF: https://github.com/llvm/llvm-project/commit/eae1d6152fd77511f943fd7f300a971c53453e70.diff

LOG: [X86] Add test coverage for #107289

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/vector-shuffle-combining.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-combining.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
index b5adfb37333571..923af983f1d47b 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
@@ -3533,6 +3533,58 @@ define <4 x i32> @PR63700(i128 %0) {
   ret <4 x i32> %shuffle.i11
 }
 
+define <16 x i8> @PR107289(<16 x i8> %0) {
+; SSE2-LABEL: PR107289:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq %xmm0, %rax
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; SSE2-NEXT:    movq %xmm0, %rcx
+; SSE2-NEXT:    shldq $8, %rax, %rcx
+; SSE2-NEXT:    shlq $8, %rax
+; SSE2-NEXT:    movq %rcx, %xmm1
+; SSE2-NEXT:    movq %rax, %xmm0
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE2-NEXT:    retq
+;
+; SSSE3-LABEL: PR107289:
+; SSSE3:       # %bb.0:
+; SSSE3-NEXT:    movq %xmm0, %rax
+; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; SSSE3-NEXT:    movq %xmm0, %rcx
+; SSSE3-NEXT:    shldq $8, %rax, %rcx
+; SSSE3-NEXT:    shlq $8, %rax
+; SSSE3-NEXT:    movq %rcx, %xmm1
+; SSSE3-NEXT:    movq %rax, %xmm0
+; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSSE3-NEXT:    retq
+;
+; SSE41-LABEL: PR107289:
+; SSE41:       # %bb.0:
+; SSE41-NEXT:    pextrq $1, %xmm0, %rax
+; SSE41-NEXT:    movq %xmm0, %rcx
+; SSE41-NEXT:    shldq $8, %rcx, %rax
+; SSE41-NEXT:    shlq $8, %rcx
+; SSE41-NEXT:    movq %rax, %xmm1
+; SSE41-NEXT:    movq %rcx, %xmm0
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE41-NEXT:    retq
+;
+; AVX-LABEL: PR107289:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vpextrq $1, %xmm0, %rax
+; AVX-NEXT:    vmovq %xmm0, %rcx
+; AVX-NEXT:    shldq $8, %rcx, %rax
+; AVX-NEXT:    shlq $8, %rcx
+; AVX-NEXT:    vmovq %rax, %xmm0
+; AVX-NEXT:    vmovq %rcx, %xmm1
+; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX-NEXT:    retq
+  %src = bitcast <16 x i8> %0 to i128
+  %shl = shl i128 %src, 8
+  %res = bitcast i128 %shl to <16 x i8>
+  ret <16 x i8> %res
+}
+
 ; Test case reported on D105827
 define void @SpinningCube() {
 ; SSE2-LABEL: SpinningCube:
@@ -3641,9 +3693,9 @@ define void @autogen_SD25931() {
 ; CHECK-LABEL: autogen_SD25931:
 ; CHECK:       # %bb.0: # %BB
 ; CHECK-NEXT:    .p2align 4, 0x90
-; CHECK-NEXT:  .LBB141_1: # %CF242
+; CHECK-NEXT:  .LBB142_1: # %CF242
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    jmp .LBB141_1
+; CHECK-NEXT:    jmp .LBB142_1
 BB:
   %Cmp16 = icmp uge <2 x i1> zeroinitializer, zeroinitializer
   %Shuff19 = shufflevector <2 x i1> zeroinitializer, <2 x i1> %Cmp16, <2 x i32> <i32 3, i32 1>