[llvm] [AArch64] Prevent generating tbl instruction instead of smull (PR #106375)

[David Green via llvm-commits]

================
@@ -16795,6 +16795,16 @@ bool AArch64TargetLowering::optimizeExtendOrTruncateConversion(
 
       DstTy = TruncDstType;
     }
+
+    // mul(zext(i8), sext) can be transformed into smull(zext, sext) when
+    // destination type is at least SrcWidth * 4, which is faster than using tbl
+    // instructions
----------------
davemgreen wrote:

I was looking at the cost of v2i64 mul in some cases. We need to be careful that they don't get scalarized again when we do reduce the costs.

https://github.com/llvm/llvm-project/pull/106375