[llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 5 22:59:18 PDT 2024
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@@ -41,6 +41,8 @@ bool isIdempotentRMW(AtomicRMWInst& RMWI) {
case AtomicRMWInst::Sub:
case AtomicRMWInst::Or:
case AtomicRMWInst::Xor:
+ case AtomicRMWInst::USubCond:
+ case AtomicRMWInst::USubSat:
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arsenm wrote:
The atomicrmw -> atomicrmw idempotent case handled here is fine, it's the atomicrmw -> load atomic case that's problematic in the lowering.
Also in a follow up, the AMDGPU lowering should have the idempotent case to add 0 since that works over PCIe
https://github.com/llvm/llvm-project/pull/105568
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