[llvm] ffeef75 - [X86] LowerSELECTWithCmpZero - without CMOV, fold "SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2))"
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 8 05:35:06 PDT 2024
Author: Simon Pilgrim
Date: 2024-09-08T12:24:28+01:00
New Revision: ffeef7599af94694191458a0e2a131e122181a13
URL: https://github.com/llvm/llvm-project/commit/ffeef7599af94694191458a0e2a131e122181a13
DIFF: https://github.com/llvm/llvm-project/commit/ffeef7599af94694191458a0e2a131e122181a13.diff
LOG: [X86] LowerSELECTWithCmpZero - without CMOV, fold "SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2))"
Use xor-bitselect pattern to avoid branching when selecting between 2 constants
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/cmov-promotion.ll
llvm/test/CodeGen/X86/select.ll
llvm/test/CodeGen/X86/select_const.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b9a6eb26fc9fcd..8c5d082024640e 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24104,6 +24104,15 @@ static SDValue LowerSELECTWithCmpZero(SDValue CmpVal, SDValue LHS, SDValue RHS,
if (isNullConstant(LHS) && isAllOnesConstant(RHS))
return SplatLSB();
+ // SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2))
+ if (!Subtarget.canUseCMOV() && isa<ConstantSDNode>(LHS) &&
+ isa<ConstantSDNode>(RHS)) {
+ SDValue Mask = SplatLSB();
+ SDValue Diff = DAG.getNode(ISD::XOR, DL, VT, LHS, RHS);
+ SDValue Flip = DAG.getNode(ISD::AND, DL, VT, Mask, Diff);
+ return DAG.getNode(ISD::XOR, DL, VT, LHS, Flip);
+ }
+
SDValue Src1, Src2;
auto isIdentityPattern = [&]() {
switch (RHS.getOpcode()) {
diff --git a/llvm/test/CodeGen/X86/cmov-promotion.ll b/llvm/test/CodeGen/X86/cmov-promotion.ll
index ff84fa4606ea0d..234201ac797b82 100644
--- a/llvm/test/CodeGen/X86/cmov-promotion.ll
+++ b/llvm/test/CodeGen/X86/cmov-promotion.ll
@@ -14,12 +14,11 @@ define i16 @cmov_zpromotion_8_to_16(i1 %c) {
;
; NO_CMOV-LABEL: cmov_zpromotion_8_to_16:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $117, %eax
-; NO_CMOV-NEXT: jne .LBB0_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $237, %eax
-; NO_CMOV-NEXT: .LBB0_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $152, %eax
+; NO_CMOV-NEXT: xorl $237, %eax
; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 117, i8 -19
@@ -38,12 +37,11 @@ define i32 @cmov_zpromotion_8_to_32(i1 %c) {
;
; NO_CMOV-LABEL: cmov_zpromotion_8_to_32:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $126, %eax
-; NO_CMOV-NEXT: jne .LBB1_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $255, %eax
-; NO_CMOV-NEXT: .LBB1_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $129, %eax
+; NO_CMOV-NEXT: xorl $255, %eax
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 12414, i8 -1
%ret = zext i8 %t0 to i32
@@ -61,12 +59,11 @@ define i64 @cmov_zpromotion_8_to_64(i1 %c) {
;
; NO_CMOV-LABEL: cmov_zpromotion_8_to_64:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $126, %eax
-; NO_CMOV-NEXT: jne .LBB2_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $255, %eax
-; NO_CMOV-NEXT: .LBB2_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $129, %eax
+; NO_CMOV-NEXT: xorl $255, %eax
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 12414, i8 -1
@@ -85,12 +82,11 @@ define i32 @cmov_zpromotion_16_to_32(i1 %c) {
;
; NO_CMOV-LABEL: cmov_zpromotion_16_to_32:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
-; NO_CMOV-NEXT: jne .LBB3_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
-; NO_CMOV-NEXT: .LBB3_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $53121, %eax # imm = 0xCF81
+; NO_CMOV-NEXT: xorl $65535, %eax # imm = 0xFFFF
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 -1
%ret = zext i16 %t0 to i32
@@ -108,12 +104,11 @@ define i64 @cmov_zpromotion_16_to_64(i1 %c) {
;
; NO_CMOV-LABEL: cmov_zpromotion_16_to_64:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
-; NO_CMOV-NEXT: jne .LBB4_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
-; NO_CMOV-NEXT: .LBB4_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $53121, %eax # imm = 0xCF81
+; NO_CMOV-NEXT: xorl $65535, %eax # imm = 0xFFFF
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 -1
@@ -132,12 +127,11 @@ define i64 @cmov_zpromotion_32_to_64(i1 %c) {
;
; NO_CMOV-LABEL: cmov_zpromotion_32_to_64:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
-; NO_CMOV-NEXT: jne .LBB5_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $43107, %eax # imm = 0xA863
-; NO_CMOV-NEXT: .LBB5_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $38941, %eax # imm = 0x981D
+; NO_CMOV-NEXT: xorl $43107, %eax # imm = 0xA863
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i32 12414, i32 43107
@@ -157,12 +151,11 @@ define i16 @cmov_spromotion_8_to_16(i1 %c) {
;
; NO_CMOV-LABEL: cmov_spromotion_8_to_16:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $117, %eax
-; NO_CMOV-NEXT: jne .LBB6_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $65517, %eax # imm = 0xFFED
-; NO_CMOV-NEXT: .LBB6_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $-104, %eax
+; NO_CMOV-NEXT: xorl $65517, %eax # imm = 0xFFED
; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 117, i8 -19
@@ -181,12 +174,11 @@ define i32 @cmov_spromotion_8_to_32(i1 %c) {
;
; NO_CMOV-LABEL: cmov_spromotion_8_to_32:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $126, %eax
-; NO_CMOV-NEXT: jne .LBB7_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $99, %eax
-; NO_CMOV-NEXT: .LBB7_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $29, %eax
+; NO_CMOV-NEXT: xorl $99, %eax
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 12414, i8 43107
%ret = sext i8 %t0 to i32
@@ -204,12 +196,11 @@ define i64 @cmov_spromotion_8_to_64(i1 %c) {
;
; NO_CMOV-LABEL: cmov_spromotion_8_to_64:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $126, %eax
-; NO_CMOV-NEXT: jne .LBB8_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $99, %eax
-; NO_CMOV-NEXT: .LBB8_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $29, %eax
+; NO_CMOV-NEXT: xorl $99, %eax
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 12414, i8 43107
@@ -228,12 +219,11 @@ define i32 @cmov_spromotion_16_to_32(i1 %c) {
;
; NO_CMOV-LABEL: cmov_spromotion_16_to_32:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
-; NO_CMOV-NEXT: jne .LBB9_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $-22429, %eax # imm = 0xA863
-; NO_CMOV-NEXT: .LBB9_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $-26595, %eax # imm = 0x981D
+; NO_CMOV-NEXT: xorl $-22429, %eax # imm = 0xA863
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 43107
%ret = sext i16 %t0 to i32
@@ -251,16 +241,12 @@ define i64 @cmov_spromotion_16_to_64(i1 %c) {
;
; NO_CMOV-LABEL: cmov_spromotion_16_to_64:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; NO_CMOV-NEXT: andb $1, %cl
-; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
-; NO_CMOV-NEXT: jne .LBB10_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $-22429, %eax # imm = 0xA863
-; NO_CMOV-NEXT: .LBB10_2:
-; NO_CMOV-NEXT: xorl %edx, %edx
-; NO_CMOV-NEXT: cmpb $1, %cl
-; NO_CMOV-NEXT: sbbl %edx, %edx
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: leal -1(%eax), %edx
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $-26595, %eax # imm = 0x981D
+; NO_CMOV-NEXT: xorl $-22429, %eax # imm = 0xA863
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 43107
%ret = sext i16 %t0 to i64
@@ -278,12 +264,11 @@ define i64 @cmov_spromotion_32_to_64(i1 %c) {
;
; NO_CMOV-LABEL: cmov_spromotion_32_to_64:
; NO_CMOV: # %bb.0:
-; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
-; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
-; NO_CMOV-NEXT: jne .LBB11_2
-; NO_CMOV-NEXT: # %bb.1:
-; NO_CMOV-NEXT: movl $43107, %eax # imm = 0xA863
-; NO_CMOV-NEXT: .LBB11_2:
+; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; NO_CMOV-NEXT: andl $1, %eax
+; NO_CMOV-NEXT: negl %eax
+; NO_CMOV-NEXT: andl $38941, %eax # imm = 0x981D
+; NO_CMOV-NEXT: xorl $43107, %eax # imm = 0xA863
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i32 12414, i32 43107
diff --git a/llvm/test/CodeGen/X86/select.ll b/llvm/test/CodeGen/X86/select.ll
index 760c8355aa4572..d2e7a61bafb1c4 100644
--- a/llvm/test/CodeGen/X86/select.ll
+++ b/llvm/test/CodeGen/X86/select.ll
@@ -106,18 +106,16 @@ define i32 @test2() nounwind {
; MCU-LABEL: test2:
; MCU: # %bb.0: # %entry
; MCU-NEXT: calll return_false at PLT
-; MCU-NEXT: xorl %ecx, %ecx
-; MCU-NEXT: testb $1, %al
-; MCU-NEXT: jne .LBB1_2
-; MCU-NEXT: # %bb.1: # %entry
-; MCU-NEXT: movl $-3840, %ecx # imm = 0xF100
-; MCU-NEXT: .LBB1_2: # %entry
-; MCU-NEXT: cmpl $32768, %ecx # imm = 0x8000
-; MCU-NEXT: jge .LBB1_3
-; MCU-NEXT: # %bb.4: # %bb91
+; MCU-NEXT: movzbl %al, %eax
+; MCU-NEXT: andl $1, %eax
+; MCU-NEXT: decl %eax
+; MCU-NEXT: andl $-3840, %eax # imm = 0xF100
+; MCU-NEXT: cmpl $32768, %eax # imm = 0x8000
+; MCU-NEXT: jge .LBB1_1
+; MCU-NEXT: # %bb.2: # %bb91
; MCU-NEXT: xorl %eax, %eax
; MCU-NEXT: retl
-; MCU-NEXT: .LBB1_3: # %bb90
+; MCU-NEXT: .LBB1_1: # %bb90
entry:
%tmp73 = tail call i1 @return_false()
%g.0 = select i1 %tmp73, i16 0, i16 -480
diff --git a/llvm/test/CodeGen/X86/select_const.ll b/llvm/test/CodeGen/X86/select_const.ll
index d604923b48a11a..35f4655dd6d7c4 100644
--- a/llvm/test/CodeGen/X86/select_const.ll
+++ b/llvm/test/CodeGen/X86/select_const.ll
@@ -668,12 +668,11 @@ define i8 @sel_67_neg125(i32 %x) {
define i32 @select_C1_C2(i1 %cond) {
; X86-LABEL: select_C1_C2:
; X86: # %bb.0:
-; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $421, %eax # imm = 0x1A5
-; X86-NEXT: jne .LBB32_2
-; X86-NEXT: # %bb.1:
-; X86-NEXT: movl $42, %eax
-; X86-NEXT: .LBB32_2:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: negl %eax
+; X86-NEXT: andl $399, %eax # imm = 0x18F
+; X86-NEXT: xorl $42, %eax
; X86-NEXT: retl
;
; X64-LABEL: select_C1_C2:
@@ -712,12 +711,11 @@ define i32 @select_C1_C2_zeroext(i1 zeroext %cond) {
define i32 @select_C1_C2_signext(i1 signext %cond) {
; X86-LABEL: select_C1_C2_signext:
; X86: # %bb.0:
-; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $421, %eax # imm = 0x1A5
-; X86-NEXT: jne .LBB34_2
-; X86-NEXT: # %bb.1:
-; X86-NEXT: movl $42, %eax
-; X86-NEXT: .LBB34_2:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: negl %eax
+; X86-NEXT: andl $399, %eax # imm = 0x18F
+; X86-NEXT: xorl $42, %eax
; X86-NEXT: retl
;
; X64-LABEL: select_C1_C2_signext:
@@ -800,44 +798,34 @@ define i64 @select_2_or_inc(i64 %x) {
define <4 x i32> @sel_constants_add_constant_vec(i1 %cond) {
; X86-LABEL: sel_constants_add_constant_vec:
; X86: # %bb.0:
-; X86-NEXT: pushl %ebx
-; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %edi
-; X86-NEXT: .cfi_def_cfa_offset 12
+; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %esi
-; X86-NEXT: .cfi_def_cfa_offset 16
-; X86-NEXT: .cfi_offset %esi, -16
-; X86-NEXT: .cfi_offset %edi, -12
-; X86-NEXT: .cfi_offset %ebx, -8
-; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $-3, %ecx
-; X86-NEXT: jne .LBB37_2
-; X86-NEXT: # %bb.1:
-; X86-NEXT: movl $12, %ecx
-; X86-NEXT: .LBB37_2:
+; X86-NEXT: .cfi_def_cfa_offset 12
+; X86-NEXT: .cfi_offset %esi, -12
+; X86-NEXT: .cfi_offset %edi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl $4, %esi
-; X86-NEXT: movl $4, %edx
-; X86-NEXT: jne .LBB37_4
-; X86-NEXT: # %bb.3:
-; X86-NEXT: movl $14, %edx
-; X86-NEXT: .LBB37_4:
-; X86-NEXT: jne .LBB37_6
-; X86-NEXT: # %bb.5:
-; X86-NEXT: movl $15, %esi
-; X86-NEXT: .LBB37_6:
-; X86-NEXT: setne %bl
-; X86-NEXT: movzbl %bl, %edi
-; X86-NEXT: addl $13, %edi
-; X86-NEXT: movl %esi, 12(%eax)
-; X86-NEXT: movl %edx, 8(%eax)
-; X86-NEXT: movl %edi, 4(%eax)
-; X86-NEXT: movl %ecx, (%eax)
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $1, %ecx
+; X86-NEXT: negl %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: andl $-15, %edx
+; X86-NEXT: orl $12, %edx
+; X86-NEXT: movl %ecx, %esi
+; X86-NEXT: andl $3, %esi
+; X86-NEXT: xorl $13, %esi
+; X86-NEXT: movl %ecx, %edi
+; X86-NEXT: andl $10, %edi
+; X86-NEXT: xorl $14, %edi
+; X86-NEXT: andl $11, %ecx
+; X86-NEXT: xorl $15, %ecx
+; X86-NEXT: movl %ecx, 12(%eax)
+; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: movl %esi, 4(%eax)
+; X86-NEXT: movl %edx, (%eax)
; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 12
-; X86-NEXT: popl %edi
; X86-NEXT: .cfi_def_cfa_offset 8
-; X86-NEXT: popl %ebx
+; X86-NEXT: popl %edi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl $4
;
@@ -907,14 +895,12 @@ define i64 @opaque_constant(i1 %cond, i64 %x) {
; X86-NEXT: .cfi_offset %ebx, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $-4, %eax
-; X86-NEXT: jne .LBB39_2
-; X86-NEXT: # %bb.1:
-; X86-NEXT: movl $23, %eax
-; X86-NEXT: .LBB39_2:
-; X86-NEXT: setne %dl
-; X86-NEXT: movzbl %dl, %edx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $1, %edx
+; X86-NEXT: negl %edx
+; X86-NEXT: andl $1, %edx
+; X86-NEXT: decl %eax
; X86-NEXT: andl $1, %eax
; X86-NEXT: xorl $1, %esi
; X86-NEXT: xorl $1, %ecx
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