[llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 6 00:47:42 PDT 2024
https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/107432
>From 265e7ec868d8445516bf744f15a5306821049c60 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Thu, 5 Sep 2024 23:57:35 +0800
Subject: [PATCH 1/3] [LoongArch][ISel] Add pre-commit tests. NFC.
---
.../ir-instruction/sdiv-udiv-srem-urem.ll | 60 +++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
index ab3eec240db3c1..00905ed053e59b 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
@@ -1151,3 +1151,63 @@ entry:
%r = urem i64 %a, %b
ret i64 %r
}
+
+define signext i32 @pr107414(i32 signext %x) {
+; LA32-LABEL: pr107414:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: addi.w $sp, $sp, -16
+; LA32-NEXT: .cfi_def_cfa_offset 16
+; LA32-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-NEXT: .cfi_offset 1, -4
+; LA32-NEXT: move $a2, $a0
+; LA32-NEXT: srai.w $a3, $a0, 31
+; LA32-NEXT: lu12i.w $a0, -266831
+; LA32-NEXT: ori $a0, $a0, 3337
+; LA32-NEXT: move $a1, $zero
+; LA32-NEXT: bl %plt(__divdi3)
+; LA32-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-NEXT: addi.w $sp, $sp, 16
+; LA32-NEXT: ret
+;
+; LA64-LABEL: pr107414:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: lu12i.w $a1, -266831
+; LA64-NEXT: ori $a1, $a1, 3337
+; LA64-NEXT: lu32i.d $a1, 0
+; LA64-NEXT: div.w $a0, $a1, $a0
+; LA64-NEXT: ret
+;
+; LA32-TRAP-LABEL: pr107414:
+; LA32-TRAP: # %bb.0: # %entry
+; LA32-TRAP-NEXT: addi.w $sp, $sp, -16
+; LA32-TRAP-NEXT: .cfi_def_cfa_offset 16
+; LA32-TRAP-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-TRAP-NEXT: .cfi_offset 1, -4
+; LA32-TRAP-NEXT: move $a2, $a0
+; LA32-TRAP-NEXT: srai.w $a3, $a0, 31
+; LA32-TRAP-NEXT: lu12i.w $a0, -266831
+; LA32-TRAP-NEXT: ori $a0, $a0, 3337
+; LA32-TRAP-NEXT: move $a1, $zero
+; LA32-TRAP-NEXT: bl %plt(__divdi3)
+; LA32-TRAP-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-TRAP-NEXT: addi.w $sp, $sp, 16
+; LA32-TRAP-NEXT: ret
+;
+; LA64-TRAP-LABEL: pr107414:
+; LA64-TRAP: # %bb.0: # %entry
+; LA64-TRAP-NEXT: move $a1, $a0
+; LA64-TRAP-NEXT: lu12i.w $a0, -266831
+; LA64-TRAP-NEXT: ori $a0, $a0, 3337
+; LA64-TRAP-NEXT: lu32i.d $a0, 0
+; LA64-TRAP-NEXT: div.w $a0, $a0, $a1
+; LA64-TRAP-NEXT: bnez $a1, .LBB32_2
+; LA64-TRAP-NEXT: # %bb.1: # %entry
+; LA64-TRAP-NEXT: break 7
+; LA64-TRAP-NEXT: .LBB32_2: # %entry
+; LA64-TRAP-NEXT: ret
+entry:
+ %conv = sext i32 %x to i64
+ %div = sdiv i64 3202030857, %conv
+ %conv1 = trunc i64 %div to i32
+ ret i32 %conv1
+}
>From ba14e763abf7f6d1d5ab59a58ece944247dbd039 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Fri, 6 Sep 2024 00:39:00 +0800
Subject: [PATCH 2/3] [LoongArch][ISel] Check number of sign bits in
`PatGprGpr_32`
---
.../Target/LoongArch/LoongArchInstrInfo.td | 8 ++++----
.../ir-instruction/sdiv-udiv-srem-urem.ll | 19 ++++++++-----------
2 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
index 0ab429817724c4..92263cc6b779b7 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -1065,10 +1065,13 @@ def RDTIME_D : RDTIME_2R<0x00006800>;
/// Generic pattern classes
+def sexti32 : ComplexPattern<i64, 1, "selectSExti32">;
+def zexti32 : ComplexPattern<i64, 1, "selectZExti32">;
+
class PatGprGpr<SDPatternOperator OpNode, LAInst Inst>
: Pat<(OpNode GPR:$rj, GPR:$rk), (Inst GPR:$rj, GPR:$rk)>;
class PatGprGpr_32<SDPatternOperator OpNode, LAInst Inst>
- : Pat<(sext_inreg (OpNode GPR:$rj, GPR:$rk), i32), (Inst GPR:$rj, GPR:$rk)>;
+ : Pat<(sext_inreg (OpNode (sexti32 GPR:$rj), (sexti32 GPR:$rk)), i32), (Inst GPR:$rj, GPR:$rk)>;
class PatGpr<SDPatternOperator OpNode, LAInst Inst>
: Pat<(OpNode GPR:$rj), (Inst GPR:$rj)>;
@@ -1095,9 +1098,6 @@ def shiftMaskGRLen
: ComplexPattern<GRLenVT, 1, "selectShiftMaskGRLen", [], [], 0>;
def shiftMask32 : ComplexPattern<i64, 1, "selectShiftMask32", [], [], 0>;
-def sexti32 : ComplexPattern<i64, 1, "selectSExti32">;
-def zexti32 : ComplexPattern<i64, 1, "selectZExti32">;
-
class shiftop<SDPatternOperator operator>
: PatFrag<(ops node:$val, node:$count),
(operator node:$val, (GRLenVT (shiftMaskGRLen node:$count)))>;
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
index 00905ed053e59b..8c2f67896efc46 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
@@ -189,8 +189,6 @@ define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
;
; LA64-LABEL: sdiv_si32_ui32_ui32:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: addi.w $a1, $a1, 0
-; LA64-NEXT: addi.w $a0, $a0, 0
; LA64-NEXT: div.w $a0, $a0, $a1
; LA64-NEXT: ret
;
@@ -205,8 +203,6 @@ define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
;
; LA64-TRAP-LABEL: sdiv_si32_ui32_ui32:
; LA64-TRAP: # %bb.0: # %entry
-; LA64-TRAP-NEXT: addi.w $a1, $a1, 0
-; LA64-TRAP-NEXT: addi.w $a0, $a0, 0
; LA64-TRAP-NEXT: div.w $a0, $a0, $a1
; LA64-TRAP-NEXT: bnez $a1, .LBB5_2
; LA64-TRAP-NEXT: # %bb.1: # %entry
@@ -1174,7 +1170,8 @@ define signext i32 @pr107414(i32 signext %x) {
; LA64-NEXT: lu12i.w $a1, -266831
; LA64-NEXT: ori $a1, $a1, 3337
; LA64-NEXT: lu32i.d $a1, 0
-; LA64-NEXT: div.w $a0, $a1, $a0
+; LA64-NEXT: div.d $a0, $a1, $a0
+; LA64-NEXT: addi.w $a0, $a0, 0
; LA64-NEXT: ret
;
; LA32-TRAP-LABEL: pr107414:
@@ -1195,15 +1192,15 @@ define signext i32 @pr107414(i32 signext %x) {
;
; LA64-TRAP-LABEL: pr107414:
; LA64-TRAP: # %bb.0: # %entry
-; LA64-TRAP-NEXT: move $a1, $a0
-; LA64-TRAP-NEXT: lu12i.w $a0, -266831
-; LA64-TRAP-NEXT: ori $a0, $a0, 3337
-; LA64-TRAP-NEXT: lu32i.d $a0, 0
-; LA64-TRAP-NEXT: div.w $a0, $a0, $a1
-; LA64-TRAP-NEXT: bnez $a1, .LBB32_2
+; LA64-TRAP-NEXT: lu12i.w $a1, -266831
+; LA64-TRAP-NEXT: ori $a1, $a1, 3337
+; LA64-TRAP-NEXT: lu32i.d $a1, 0
+; LA64-TRAP-NEXT: div.d $a1, $a1, $a0
+; LA64-TRAP-NEXT: bnez $a0, .LBB32_2
; LA64-TRAP-NEXT: # %bb.1: # %entry
; LA64-TRAP-NEXT: break 7
; LA64-TRAP-NEXT: .LBB32_2: # %entry
+; LA64-TRAP-NEXT: addi.w $a0, $a1, 0
; LA64-TRAP-NEXT: ret
entry:
%conv = sext i32 %x to i64
>From 8ae4f680c4212c805cb4e5cbe647ef1358551d77 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Fri, 6 Sep 2024 15:36:03 +0800
Subject: [PATCH 3/3] [LoongArch][ISel] Use assertsexti32 instead
---
llvm/lib/Target/LoongArch/LoongArchInstrInfo.td | 11 +++++++----
.../LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll | 10 ++++++++--
2 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
index 92263cc6b779b7..15a8f4e3c0755d 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -1065,13 +1065,13 @@ def RDTIME_D : RDTIME_2R<0x00006800>;
/// Generic pattern classes
-def sexti32 : ComplexPattern<i64, 1, "selectSExti32">;
-def zexti32 : ComplexPattern<i64, 1, "selectZExti32">;
-
+def assertsexti32 : PatFrag<(ops node:$src), (assertsext node:$src), [{
+ return cast<VTSDNode>(N->getOperand(1))->getVT().bitsLE(MVT::i32);
+}]>;
class PatGprGpr<SDPatternOperator OpNode, LAInst Inst>
: Pat<(OpNode GPR:$rj, GPR:$rk), (Inst GPR:$rj, GPR:$rk)>;
class PatGprGpr_32<SDPatternOperator OpNode, LAInst Inst>
- : Pat<(sext_inreg (OpNode (sexti32 GPR:$rj), (sexti32 GPR:$rk)), i32), (Inst GPR:$rj, GPR:$rk)>;
+ : Pat<(sext_inreg (OpNode (assertsexti32 GPR:$rj), (assertsexti32 GPR:$rk)), i32), (Inst GPR:$rj, GPR:$rk)>;
class PatGpr<SDPatternOperator OpNode, LAInst Inst>
: Pat<(OpNode GPR:$rj), (Inst GPR:$rj)>;
@@ -1098,6 +1098,9 @@ def shiftMaskGRLen
: ComplexPattern<GRLenVT, 1, "selectShiftMaskGRLen", [], [], 0>;
def shiftMask32 : ComplexPattern<i64, 1, "selectShiftMask32", [], [], 0>;
+def sexti32 : ComplexPattern<i64, 1, "selectSExti32">;
+def zexti32 : ComplexPattern<i64, 1, "selectZExti32">;
+
class shiftop<SDPatternOperator operator>
: PatFrag<(ops node:$val, node:$count),
(operator node:$val, (GRLenVT (shiftMaskGRLen node:$count)))>;
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
index 8c2f67896efc46..c22acdb4969071 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
@@ -189,7 +189,10 @@ define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
;
; LA64-LABEL: sdiv_si32_ui32_ui32:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: div.w $a0, $a0, $a1
+; LA64-NEXT: addi.w $a1, $a1, 0
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: div.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
; LA64-NEXT: ret
;
; LA32-TRAP-LABEL: sdiv_si32_ui32_ui32:
@@ -203,11 +206,14 @@ define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
;
; LA64-TRAP-LABEL: sdiv_si32_ui32_ui32:
; LA64-TRAP: # %bb.0: # %entry
-; LA64-TRAP-NEXT: div.w $a0, $a0, $a1
+; LA64-TRAP-NEXT: addi.w $a1, $a1, 0
+; LA64-TRAP-NEXT: addi.w $a0, $a0, 0
+; LA64-TRAP-NEXT: div.d $a0, $a0, $a1
; LA64-TRAP-NEXT: bnez $a1, .LBB5_2
; LA64-TRAP-NEXT: # %bb.1: # %entry
; LA64-TRAP-NEXT: break 7
; LA64-TRAP-NEXT: .LBB5_2: # %entry
+; LA64-TRAP-NEXT: addi.w $a0, $a0, 0
; LA64-TRAP-NEXT: ret
entry:
%r = sdiv i32 %a, %b
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