[llvm] f5b7c10 - [Hexagon] Avoid repeated hash lookups (NFC) (#107760)

via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 8 10:03:11 PDT 2024


Author: Kazu Hirata
Date: 2024-09-08T10:03:05-07:00
New Revision: f5b7c10923566ee4c49eb918cfa6941e2a6f6456

URL: https://github.com/llvm/llvm-project/commit/f5b7c10923566ee4c49eb918cfa6941e2a6f6456
DIFF: https://github.com/llvm/llvm-project/commit/f5b7c10923566ee4c49eb918cfa6941e2a6f6456.diff

LOG: [Hexagon] Avoid repeated hash lookups (NFC) (#107760)

Added: 
    

Modified: 
    llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
    llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp b/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
index 88b4defc754ab1..8cf853ad0110d1 100644
--- a/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
@@ -297,11 +297,7 @@ LaneBitmask HexagonExpandCondsets::getLaneMask(Register Reg, unsigned Sub) {
 void HexagonExpandCondsets::addRefToMap(RegisterRef RR, ReferenceMap &Map,
       unsigned Exec) {
   unsigned Mask = getMaskForSub(RR.Sub) | Exec;
-  ReferenceMap::iterator F = Map.find(RR.Reg);
-  if (F == Map.end())
-    Map.insert(std::make_pair(RR.Reg, Mask));
-  else
-    F->second |= Mask;
+  Map[RR.Reg] |= Mask;
 }
 
 bool HexagonExpandCondsets::isRefInMap(RegisterRef RR, ReferenceMap &Map,

diff  --git a/llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp b/llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
index fe0875a3d6a4f3..e042522663867a 100644
--- a/llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
@@ -92,11 +92,7 @@ bool HexagonTfrCleanup::isIntReg(unsigned Reg, bool &Is32) {
 // Assign given value V32 to the specified the register R32 in the map. Only
 // 32-bit registers are valid arguments.
 void HexagonTfrCleanup::setReg(unsigned R32, uint32_t V32, ImmediateMap &IMap) {
-  ImmediateMap::iterator F = IMap.find(R32);
-  if (F == IMap.end())
-    IMap.insert(std::make_pair(R32, V32));
-  else
-    F->second = V32;
+  IMap[R32] = V32;
 }
 
 // Retrieve a value of the provided register Reg and store it into Val.


        


More information about the llvm-commits mailing list