[llvm] [AArch64]Fix invalid use of ld1/st1 in stack alloc (PR #105518)

[Sander de Smalen via llvm-commits]

================
@@ -3044,9 +3045,14 @@ static void computeCalleeSaveRegisterPairs(
       case RegPairInfo::PPR:
         break;
       case RegPairInfo::ZPR:
-        if (AFI->getPredicateRegForFillSpill() != 0)
-          if (((RPI.Reg1 - AArch64::Z0) & 1) == 0 && (NextReg == RPI.Reg1 + 1))
+        if (AFI->getPredicateRegForFillSpill() != 0 &&
+            ((RPI.Reg1 - AArch64::Z0) & 1) == 0 && (NextReg == RPI.Reg1 + 1)) {
+          // Calculate offset of register pair to see if pair instruction can be
+          // used.
+          int Offset = (ScalableByteOffset + StackFillDir * 2 * Scale) / Scale;
+          if ((-17 < Offset && Offset < 15) && (Offset % 2 == 0))
----------------
sdesmalen-arm wrote:

nit: I personally find this a bit more easy to read, because it uses the same offsets as described in the ISA spec.
```suggestion
          if ((-16 <= Offset && Offset <= 14) && (Offset % 2 == 0))
```

https://github.com/llvm/llvm-project/pull/105518